PI6C184-02 PERICOM [Pericom Semiconductor Corporation], PI6C184-02 Datasheet

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PI6C184-02

Manufacturer Part Number
PI6C184-02
Description
Precision 1-13 Clock Buffer
Manufacturer
PERICOM [Pericom Semiconductor Corporation]
Datasheet
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 1 2 3 4 5 6 7 8 9 0 1 2
Features
• High speed, low noise non-inverting 1-13 buffer
• Supports up to four SDRAM DIMMs
• Low skew (<250ps) between any two output clocks
• I
• Multiple V
• 3.3V power supply voltage
• 28-pin SSOP and SOIC packages (H, S)
Block Diagram
2
C Serial Configuration interface
DD
, V
SS
pins for noise reduction
1
Description
The PI6C184-02 is a high-speed low-noise 1-13 non-inverting
buffer designed for SDRAM clock buffer applications.
This buffer is intended to be used with the PI6C104 clock generator
for Intel Architecture for both desktop and mobile systems.
At power up all SDRAM output are enabled and active. The
I
any of the 13 output drivers.
Note:
Purchase of I
use them in an I
Pin Configuration
2
C Serial control may be used to individually activate/deactivate
2
C components from Pericom conveys a license to
2
C system as defined by Philips.
Precision 1-13 Clock Buffer
28-Pin
H, S
PI6C184-02
PS8319
05/03/00

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PI6C184-02 Summary of contents

Page 1

... SSOP and SOIC packages (H, S) Block Diagram Precision 1-13 Clock Buffer Description The PI6C184- high-speed low-noise 1-13 non-inverting buffer designed for SDRAM clock buffer applications. This buffer is intended to be used with the PI6C104 clock generator for Intel Architecture for both desktop and mobile systems. ...

Page 2

... Pin Description P Precision 1-13 Clock Buffer PI6C184 Serial Configuration Map Byte0: SDRAM Active/Inactive Register (1 = enable disable) Note: Inactive means outputs are held LOW and are disabled from switching 2 PI6C184-02 PS8319 05/03/00 ...

Page 3

... The I C interface permits individual enable/disable of each clock output and test mode enable. The PI6C184- slave receiver device. It can not be read back. Sub addressing is not supported. All preceding bytes must be sent in order to change one of the control bytes. Every bite put on the SDATA line must be 8-bits long (MSB first), followed by an acknowledge bit generated by the receiving device ...

Page 4

... SDRAM Clock Buffer Operating Specification AC Timing Precision 1-13 Clock Buffer 4 PI6C184-02 PS8319 05/03/00 ...

Page 5

... Route clock traces over a continuous ground plane or over a continuous power plane. Avoid routing clock traces from plane to plane (refer to rule #2). 4. Position clock signals away from signals that go to any cables or any external connectors. Figure 1. Clock Waveforms 5 PI6C184-02 Precision 1-13 Clock Buffer PS8319 05/03/00 1 ...

Page 6

... DENOTES DIMENSIONS X.XX IN MILLIMETERS Ordering Information 2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com 0.254 .010 x 45˚ 0.737 .029 0.23 .0091 0-8˚ 0.32 .0125 0.41 .016 1.27 .050 .394 .419 10.00 10.65 Pericom Semiconductor Corporation 6 PI6C184-02 Precision 1-13 Clock Buffer PS8319 05/03/00 ...

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