MAX7325ATG+ MAXIM [Maxim Integrated Products], MAX7325ATG+ Datasheet - Page 13

• Manufacturer Part Number: MAX7325ATG+
• Description: I2C Port Expander with 8 Push-Pull and 8 Open-Drain I/Os
• Manufacturer: MAXIM [Maxim Integrated Products]

acknowledge. The new snapshot data is the current
port data transmitted to the master, and therefore, port
changes occuring during the transmission are detect-
ed. INT remains high until the STOP condition.
The master can read 2 bytes from the open-drain ports
of the MAX7325 and subsequently issues a STOP con-
dition (Figure 7). In this case, the MAX7325 transmits
the current port data, followed by the change flags. The
change flags are then cleared, and transition detection
is reset. INT goes high (high impedance if an external
pullup resistor is not fitted) during the slave acknowl-
edge. The new snapshot data is the current port data
transmitted to the master, and therefore, port changes
occuring during the transmission are detected. INT
remains high until the STOP condition.
Figure 7. Reading Open-Drain Ports of the MAX7325 (2 Data Bytes)
Figure 8. Reading Push-Pull Ports of MAX7325
t
IV
PORTS
INT OUTPUT
SCL
S
SCL
S
1
______________________________________________________________________________________
1
0
MAX7325 SLAVE ADDRESS
MAX7325 SLAVE ADDRESS
ACKNOWLEDGE FROM MAX7325
I
FROM MAX7325
ACKNOWLEDGE
2
R/W
C Port Expander with 8 Push-Pull
PORT SNAPSHOT DATA
1
A
t
IR
t
R/W
PH
PORT SNAPSHOT
I7
D7
INT REMAINS HIGH UNTIL STOP CONDITION
1
I6
D6
I5
A
D5
PORT INPUTS
I4
PORT SNAPSHOT TAKEN
P7
D7
D4
I3
D3
P6
A read from the push-pull ports of the MAX7325 starts
with the master transmitting the group’s slave address
with the R/W bit set high. The MAX7325 acknowledges
the slave address, and samples the logic state of the
output ports during the acknowledge bit. The master can
read one or more bytes from the push-pull ports of the
MAX7325 and then issues a STOP condition (Figure 8).
The MAX7325 transmits the current port data, read
back from the actual port outputs (not the port output
latches) during the acknowledge. If a port is forced to a
logic state other than its programmed state, the read-
back reflects this. If driving a capacitive load, the read-
back port level verification algorithms may need to take
the RC rise/fall time into account.
D6
PORT SNAPSHOT
I2
and 8 Open-Drain I/Os
D2
P5
D5
I1
D1
S = START CONDITION
P = STOP CONDITION
P4
I0
D4
t
DATA 1
PSU
D0
P3
PORT SNAPSHOT TAKEN
D3
A
F7
P2
D7
D2
F6
D6
P1
D1
INTERRUPT FLAGS
F5
D5
P0
SHADED = SLAVE TRANSMISSION
N = NOT ACKNOWLEDGE
D0
F4
D4
F3
D3
A
PORT SNAPSHOT
F2
D2
ACKNOWLEDGE
FROM MASTER
P
F1
D1 D0
F0
ACKNOWLEDGE
FROM MASTER
N
t
IP
P
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