TSA5522M PHILIPS [NXP Semiconductors], TSA5522M Datasheet - Page 6

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TSA5522M

Manufacturer Part Number
TSA5522M
Description
1.4 GHz I2C-bus controlled synthesizer
Manufacturer
PHILIPS [NXP Semiconductors]
Datasheet

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Part Number
Manufacturer
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Part Number:
TSA5522M
Manufacturer:
PHILIPS/飞利浦
Quantity:
20 000
Philips Semiconductors
FUNCTIONAL DESCRIPTION
The device is controlled via the two-wire I
programming, there is one module address (7 bits) and the
R/W bit for selecting the READ or the WRITE mode.
I
W
Data bytes can be sent to the device after the address
transmission (first byte). Four data bytes are required to
fully program the device. The bus transceiver has an
auto-increment facility which permits the programming of
the device within one single transmission
(address + 4 data bytes).
The device can also be partially programmed providing
that the first data byte following the address is divider
byte 1 (DB1) or control byte (CB). The bits in the data
bytes are defined in Table 1. The first bit of the first data
Table 1 I
Note
1. Not available on 16-pin devices.
Table 2 Description of Table 1
1996 Jan 23
2
Address byte (ADB)
Divider byte 1 (DB1)
Divider byte 2 (DB2)
Control byte (CB)
Ports byte (PB)
MA1, MA0
N14 to N0
CP
T2 to T0
RSA, RSB
OS
P2 to P0
P7 to P4
X
C-bus mode
RITE MODE
1.4 GHz I
SYMBOL
BYTE
2
C-bus data format
(R/W = 0); see Table 1
2
C-bus controlled synthesizer
programmable address bits (see Table 3)
programmable divider bits N = N14
charge-pump current; CP = 0 = 50 A; CP = 1 = 250 A
test bits (see Table 4). For normal operation T2 = 0; T1 = 0; T0 = 1
reference divider ratio select bits (see Table 5)
tuning amplifier control bit; for normal operation OS = 0 and tuning voltage is ON; when
OS = 1 tuning voltage is OFF (high impedance)
PNP band switch buffers control bits
NPN open collector control bits when P
don’t care
MSB
P7
N7
1
0
1
(1)
N14
CP
N6
P6
1
2
C-bus. For
P5
N13
N5
T2
0
(1)
P4
N12
N4
DATA BYTE
T1
6
0
(1)
byte transmitted indicates whether frequency data
(first bit = 0) or control and ports data (first bit = 1) will
follow. Until an I
controller, additional data bytes can be entered without the
need to re-address the device. The frequency register is
loaded after the 8th clock pulse of the second divider
byte (DB2), the control register is loaded after the 8th clock
pulse of the control byte (CB) and the ports register is
loaded after the 8th clock pulse of the ports byte (PB).
I
The module address contains programmable address bits
(MA1 and MA0) which offer the possibility of having
several synthesizers (up to 3) in one system by applying a
specific voltage on the AS input.
The relationship between MA1 and MA0 and the input
voltage on the AS input is given in Table 3.
2
2
C-
14
DESCRIPTION
n
BUS ADDRESS SELECTION
= 0 output n is OFF; when P
+ N13
N11
N3
T0
X
0
2
13
2
MA1
RSA
N10
C-bus STOP command is sent by the
+ ... + N1
N2
P2
MA0
RSB
N9
N1
P1
2 + N0
n
= 1 output n is ON
LSB
Product specification
OS
N8
N0
P0
0
TSA5522
COMMAND
A
A
A
A
A

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