M4T32-BR12SH STMICROELECTRONICS [STMicroelectronics], M4T32-BR12SH Datasheet - Page 26

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M4T32-BR12SH

Manufacturer Part Number
M4T32-BR12SH
Description
5.0 OR 3.0V, 512 bit 64 x 8 SERIAL RTC and NVRAM SUPERVISOR
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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M41ST85Y, M41ST85W
Figure 21. Bus Timing Requirements Sequence
Table 12. AC Characteristics
Note: 1. Valid for Ambient Operating Temperature: T
26/34
t
Symbol
HD:DAT
t
t
t
t
SU:STO
2. Transmitter must internally provide a hold time to bridge the undefined region (300ns max) of the falling edge of SCL.
HD:STA
SU:DAT
SU:STA
t
t
t
EXPD
f
t
HIGH
LOW
SCL
BUF
t
t
R
F
SDA
SCL
(2)
tBUF
SCL Clock Frequency
Time the bus must be free before a new transmission can start
EX to E
SDA and SCL Fall Time
Data Hold Time
START Condition Hold Time
(after this period the first clock pulse is generated)
Clock High Period
Clock Low Period
SDA and SCL Rise Time
Data Setup Time
START Condition Setup Time
(only relevant for a repeated start condition)
STOP Condition Setup Time
P
CON
Propagation Delay
S
tHD:STA
tR
Parameter
A
tLOW
tHIGH
= –40 to 85°C; V
tF
(1)
tHD:DAT
CC
= 4.5 to 5.5V or 2.7 to 3.6V (except where noted).
tSU:DAT
M41ST85W
M41ST85Y
SR
tSU:STA
Min
600
600
100
600
600
1.3
1.3
0
0
tHD:STA
Max
P
AI00589
400
300
300
10
15
tSU:STO
Unit
kHz
µs
ns
ns
µs
ns
ns
µs
ns
ns
ns
ns

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