HSP45106/883 INTERSIL [Intersil Corporation], HSP45106/883 Datasheet

HSP45106/883

Manufacturer Part Number

HSP45106/883

Description

16-Bit Numerically Controlled Oscillator

Manufacturer

INTERSIL [Intersil Corporation]

Datasheet

1.HSP45106883.pdf (6 pages)

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16-Bit Numerically Controlled Oscillator

The Intersil HSP45106/883 is a high performance 16-bit

quadrature Numerically Controlled Oscillator (NCO16). The

NCO16 simplifies applications requiring frequency and

phase agility such as frequency-hopped modems, PSK

modems, spread spectrum communications, and precision

signal generators. As shown in the Block Diagram, the

HSP45106/883 is divided into a Phase/Frequency Control

Section (PFCS) and a Sine/Cosine Section.

The inputs to the Phase/Frequency Control Section consist

of a microprocessor interface and individual control lines.

The frequency resolution is 32 bits, which provides for

resolution of better than 0.006Hz at 25.6MHz. User

programmable center frequency and offset frequency

registers give the user the capability to perform phase

coherent switching between two sinusoids of different

frequencies. Further, a programmable phase control register

allows for phase control of better than 0.006o. In applications

requiring up to 8 level PSK, three discrete inputs are

provided to simplify implementation.

The output of the PFCS is a 32-bit phase argument which is

input to the Sine/Cosine Section for conversion into

sinusoidal amplitude. The outputs of the Sine/Cosine

Section are two 16-bit quadrature signals. The spurious free

dynamic range of this complex vector is greater than 90dBc.

For added flexibility when using the NCO16 in conjunction

with DAC’s, a choice of either parallel of serial outputs with

either two’s complement or offset binary encoding is

provided. In addition, a synchronization signal is available

which signals serial word boundaries.

Block Diagram

MICROPROCESSOR

CONTROL SIGNALS

INTERFACE

DISCRETE

CLOCK

Data Sheet

FREQUENCY

CONTROL

SECTION

PHASE/

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 321-724-7143

ARGUMENT

SIN/COS

Features

• This Circuit is Processed in Accordance to MIL-STD-883

• 25.6MHz Clock Rate

• 32-Bit Center and Offset Frequency Control

• 16-Bit Phase Control

• 8 Level PSK Supported Through Three Pin Interface

• Simultaneous 16-Bit Sine and Cosine Outputs

• Output in Two’s Complement or Offset Binary

• <0.006Hz Tuning Resolution at 25.6MHz

• Serial or Parallel Outputs

• Spurious Frequency Components < -90dBc

• 16-Bit Microprocessor Compatible Control Interface

Applications

• Direct Digital Synthesis

• Quadrature Signal Generation

• Modulation - FM, FSK, PSK (BPSK, QPSK, 8PSK)

• Precision Signal Generation

Ordering Information

HSP45106GM-25/883

and is Fully Conformant Under the Provisions of

Paragraph 1.2.1.

PART NUMBER

SECTION

COSINE

SINE/

May 1999

Intersil (and design) is a trademark of Intersil Americas Inc.

RANGE (

COSINE

SINE

-55 to 125

TEMP.

HSP45106/883

85 Ld PGA

PACKAGE

FN2815.3

G85.A

PKG.

NO.

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HSP45106/883 Summary of contents

Page 1

... TM Data Sheet 16-Bit Numerically Controlled Oscillator The Intersil HSP45106/883 is a high performance 16-bit quadrature Numerically Controlled Oscillator (NCO16). The NCO16 simplifies applications requiring frequency and phase agility such as frequency-hopped modems, PSK modems, spread spectrum communications, and precision signal generators. As shown in the Block Diagram, the HSP45106/883 is divided into a Phase/Frequency Control Section (PFCS) and a Sine/Cosine Section ...

Page 2

... Interchanging of force and sense conditions is permitted. 3. Operating supply current is proportional to frequency, typical rating is 8mA/MHz. 4. Tested as follows 1MHz 2. Loading is as specified in the test load circuit with C 2 HSP45106/883 Thermal Information Thermal Resistance (Typical, Note 1) +0.5V PGA Package . . . . . . . . . . . . . . . . . . . . CC Maximum Package Power Dissipation at 125 PGA Package ...

Page 3

... Transition is measured at ±200mV from steady state voltage with loading as specified by test load circuit and ENOFRCTL, ENCFRACTL, ENTICTL, or ENPHREG are active, care must be taken to not violate setup and hold times to these registers when writing data into the chip via the C(15:0) port. 3 HSP45106/883 GROUP A NOTES SUBGROUP ...

Page 4

... Loading is as specified in the test load circuit with switch closed and C CONFORMANCE GROUPS Initial Test Interim Test PDA Final Test Group A Groups C and D 4 HSP45106/883 CONDITIONS NOTES = Open 1MHz, all measure Open 1MHz, all measure 40pF ...

Page 5

... V = 5.5V ±0.5V. 13 14. 0.1µF (min) capacitor between V and GND per position 100kHz ±10 F0/ F1/2...., F11 = F10/2, 40% - 60% Duty Cycle. 16. Input voltage limits 0.8V max HSP45106/883 HSP45106/833 (PGA SIN1 SIN3 SIN5 SIN4 SIN9 ...

Page 6

... Intersil Corporation 7585 Irvine Center Drive 2401 Palm Bay Rd. Suite 100 Palm Bay, FL 32905 Irvine, CA 92618 TEL: (321) 724-7000 TEL: (949) 341-7000 FAX: (321) 724-7946 FAX: (949) 341-7123 6 HSP45106/883 GLASSIVATION: Type: Nitrox Å Thickness: 10k WORST CASE CURRENT DENSITY 0 A/cm EUROPE ...

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