PCF85321 NXP [NXP Semiconductors], PCF85321 Datasheet

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PCF85321

Manufacturer Part Number

PCF85321

Description

Universal LCD driver for low multiplex rates

Manufacturer

NXP [NXP Semiconductors]

Datasheet

1.PCF85321.pdf (44 pages)

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Download datasheet (222Kb)

1. General description

2. Features

The PCF8532 is a peripheral device which interfaces to almost any Liquid Crystal Display

(LCD) with low multiplex rates. It generates the drive signals for any static or multiplexed

LCD containing up to four backplanes and up to 160 segments and can easily be

cascaded for larger LCD applications. The PCF8532 is compatible with most

microprocessors or microcontrollers and communicates via a two-line bidirectional

I

auto-incremental addressing, by hardware subaddressing and by display memory

switching (static and duplex drive modes).

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

I

2

C-bus. Communication overheads are minimized by a display RAM with

PCF8532

Universal LCD driver for low multiplex rates

Rev. 1 — 10 February 2009

Single-chip LCD controller and driver for up to 640 elements

Selectable backplane drive conﬁguration: static or 2, 3 or 4 backplane multiplexing

160 segment drives:

May be cascaded for large LCD applications (up to 2560 elements possible)

160

Software programmable frame frequency in steps of 5 Hz in the range of 60 Hz to

90 Hz

Wide LCD supply range: from 2.5 V for low threshold LCDs and up to 8.0 V for

guest-host LCDs and high threshold (automobile) twisted nematic LCDs

Internal LCD bias generation with voltage-follower buffers

Selectable display bias conﬁguration: static,

Wide power supply range: from 1.8 V to 5.5 V

LCD and logic supplies may be separated

Low power consumption, typically: I

400 kHz I

Auto-incremental display data loading across device subaddress boundaries

Versatile blinking modes

Compatible with Chip-On-Glass (COG) technology

Display memory bank switching in static and duplex drive modes

No external components

Manufactured in silicon gate CMOS process

Two sets of backplane outputs for optimal COG conﬁgurations of the application

N

N

N

Up to 80 7-segment numeric characters

Up to 42 14-segment alphanumeric characters

Any graphics of up to 640 elements

4-bit RAM for display data storage

2

C-bus interface

DD

= 4 A, I

1

2

or

DD(LCD)

1

3

= 40 A

Product data sheet

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