PCF8562TT-2 NXP [NXP Semiconductors], PCF8562TT-2 Datasheet - Page 26

• Manufacturer Part Number: PCF8562TT-2
• Description: Universal LCD driver for low multiplex rates
• Manufacturer: NXP [NXP Semiconductors]

NXP Semiconductors
PCF8562
Product data sheet
8.4 Acknowledge
The number of data bytes transferred between the START and STOP conditions from
transmitter to receiver is unlimited. Each byte of eight bits is followed by an acknowledge
cycle.
Acknowledgement on the I
Fig 15. System configuration
Fig 16. Acknowledgement of the I
•
•
•
•
A slave receiver, which is addressed, must generate an acknowledge after the
reception of each byte.
A master receiver must generate an acknowledge after the reception of each byte that
has been clocked out of the slave transmitter.
The device that acknowledges must pull-down the SDA line during the acknowledge
clock pulse, so that the SDA line is stable LOW during the HIGH period of the
acknowledge related clock pulse (set-up and hold times must be taken into
consideration).
A master receiver must signal an end of data to the transmitter by not generating an
acknowledge on the last byte that has been clocked out of the slave. In this event, the
transmitter must leave the data line HIGH to enable the master to generate a STOP
condition.
SCL
SDA
by transmitter
data output
by receiver
data output
TRANSMITTER/
SCL from
RECEIVER
master
MASTER
All information provided in this document is subject to legal disclaimers.
condition
START
S
Rev. 6 — 16 June 2011
RECEIVER
2
C-bus is illustrated in
SLAVE
2
1
C-bus
TRANSMITTER/
RECEIVER
Universal LCD driver for low multiplex rates
SLAVE
2
Figure
TRANSMITTER
16.
MASTER
not acknowledge
acknowledge
8
acknowledgement
clock pulse for
PCF8562
TRANSMITTER/
© NXP B.V. 2011. All rights reserved.
RECEIVER
MASTER
9
mbc602
mga807
26 of 43