AD7367-5ARUZ-REEL7 AD [Analog Devices], AD7367-5ARUZ-REEL7 Datasheet
AD7367-5ARUZ-REEL7
Related parts for AD7367-5ARUZ-REEL7
AD7367-5ARUZ-REEL7 Summary of contents
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... The AD7367 can accept true bipolar analog input signals in the ±10 V range, ±5 V range and range. The AD7367 has an on-chip 2.5 V reference that can be overdriven if an external reference is preferred. The AD7367 is available in a 24-lead TSSOP package. ...
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... AD7367 TABLE OF CONTENTS FEATURES ........................................................................................ 1 GENERAL DESCRIPTION ............................................................ 1 FUNCTIONAL BLOCK DIAGRAM............................................. 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Timing Specifications .................................................................. 5 Absolute Maximum Ratings............................................................ 6 ESD Caution.................................................................................. 6 Pin Configuration and Function Descriptions............................. 7 Terminology ...................................................................................... 9 Theory of operation ................................................................... 10 REVISION HISTORY 4/06—PRA: Initial Version 5/06—PRA changes to PRB: Initial Version 10/06—PRB changes to PRC: Modified Supply specifications Preliminary Technical Data Analog Inputs ...
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... AD7367 SPECIFICATIONS = 2.5 V Internal/External REF A MIN Table 2. Parameter DYNAMIC PERFORMANCE 2 Signal-to-Noise Ratio (SNR) Signal-to-Noise + Distortion Ratio 2 (SINAD) 2 Total Harmonic Distortion (THD) Spurious Free Dynamic Range (SFDR) 2 Intermodulation Distortion (IMD) Second Order Terms ...
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... AD7367 Parameter REFERENCE INPUT/OUTPUT 4 Reference Output Voltage Reference Input Voltage Range DC Leakage Current Input Capacitance Output Impedance REF REF Reference Temperature Coefficient V Noise REF LOGIC INPUTS Input High Voltage, V INH Input Low Voltage, V INL Input Current Input Capacitance, C ...
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... AD7367 TIMING SPECIFICATIONS =4. 5. 11. otherwise noted . Table 3. Parameter Limit MIN 2.7V≤V <4.75V 4.75V≤V DRIVE t 680 680 CONVERT SCLK QUIET ...
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... AD7367 ABSOLUTE MAXIMUM RATINGS Table 4 Parameter Rating V to AGND, DGND −0 +16 AGND, DGND −0 +16 DGND −0 DRIVE V to AVcc Vcc – 0.3V to +16. AGND, DGND -0. DGND -0 ...
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... AGND Analog Ground. Ground reference point for all analog circuitry on the AD7367. All analog input signals and any external reference signal should be referred to this AGND voltage. Both AGND pins should connect to the AGND plane of a system. The AGND and DGND voltages ideally should be at the same potential and must not be more than 0 ...
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... DGND Digital Ground. This is the ground reference point for all digital circuitry on the AD7367. The DGND pin should connect to the DGND plane of a system. The DGND and AGND voltages should ideally be at the same potential and must not be more than 0.3 V apart, even on a transient basis. ...
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... N-bit converter with a sine wave input is given by: Signal to (Noise + Distortion) = (6.02N + 1.76) dB Thus for a 12-bit converter, this is 74 dB. Total Harmonic Distortion (THD) Total harmonic distortion is the ratio of the rms sum of harmonics to the fundamental. For the AD7367 defined as: THD where and V ...
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... On the falling edge of BUSY the track- and-hold will return to track mode. Once the conversion is finished, the serial clock input accesses data from the part. The AD7367 has an on-chip 2.5 V reference that can be overdriven when an external reference is preferred. If the internal reference used elsewhere in a system, then the output from D A & ...
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... Do not program The AD7367 requires V CAPACITIVE voltage analog input structures. These supplies must be equal to DAC or greater than ±11.5V. See Table 6 for the requirements on these supplies. The AD7367 requires a low voltage 4.75V to 5.25 CONTROL LOGIC supply for the Digital Power and a 2.7V to 5.25V V for the interface power ...
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... The reference buffer requires 500 µs to power up and charge the 680nF decoupling capacitor during the power-up time. The AD7367 is specified for a 2 reference range. When a 3V reference is selected, the ranges are ±12 V, ±6 V, and +12 V. For these ranges, the V equal to or greater than the +12V & ...
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... AD7367 MODES OF OPERATION The mode of operation of the AD7367 is selected by the (logic) state of the CONVST signal at the end of a conversion. There are two possible modes of operation: normal mode and shut-down mode. These modes of operation are designed to provide flexible power management options. These options can be chosen to optimize the power dissipation/throughput rate ratio for differing application requirements ...
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... CAP be brought high and remain high for a minimum of 100μs, as shown in Figure 8. When power supplies are first applied to the AD7367, the ADC may power up with CONVST in either the low or high logic state. Before attempting a valid conversion CONVST must be brought high and remain high for the recommended power up time of 100μ ...
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... If the falling edge of SCLK coincides with the falling edge then the falling edge of SCLK is not acknowledged by the AD7367, and the next falling edge of the SCLK will be the first registered after the falling edges of the CS . The CS pin can be brought low before the BUSY signal goes low indicating the end of a conversion ...
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... AD7367ARUZ-REEL7 −40°C to +85°C 1 AD7367BRUZ −40°C to +85°C 1 AD7367BRUZ-REEL7 −40°C to +85°C 1 AD7367-5ARUZ −40°C to +85°C 1 AD7367-5ARUZ-REEL7 −40°C to +85°C 1 AD7367-5BRUZ −40°C to +85°C 1 AD7367-5BRUZ-REEL7 −40°C to +85° Pb-free part. 7.90 7.80 7. ...