AT84AD001BCTD ATMEL [ATMEL Corporation], AT84AD001BCTD Datasheet - Page 37

no-image

AT84AD001BCTD

Manufacturer Part Number
AT84AD001BCTD
Description
Dual 8-bit 1 Gsps ADC
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
3-wire Serial Interface and
Data Description
Table 12. 3-wire Serial Interface Address Setting Description
2153C–BDC–04/04
Address
000
001
010
011
100
Setting
Standby
Gray/binary mode
1:1 or 1:2 DMUX mode
Analog input MUX
Clock selection
Auto-calibration
Decimation test mode
Data Ready Delay Adjust
Analog gain adjustment
Data7 to Data0: gain channel I
Data15 to Data8: gain channel Q
Code 00000000: -1.5 dB
Code 10000000: 0 dB
Code 11111111: 1.5 dB
Steps: 0.011 dB
Offset compensation
Data7 to Data0: offset channel I
Data15 to Data8: offset channel Q
Data7 and Data15: sign bits
Code 11111111b: 31.75 LSB
Code 10000000b: 0 LSB
Code 00000000b: 0 LSB
Code 01111111b: -31.75 LSB
Steps: 0.25 LSB
Maximum correction: ±31.75 LSB
Gain compensation
Data6 to Data0: channel I/Q (Q is matched to I)
Code 11111111b: -0.315 dB
Code 10000000b: 0 dB
Code 0000000b: 0 dB
Code 0111111b: 0.315 dB
Steps: 0.005 dB
Data6: sign bit
Internal Settling Adjustment (ISA)
Data2 to Data0: channel I
Data5 to Data3: channel Q
Data15 to Data6: 1000010000
The 3-wire bus is activated with the control bit mode set to 1. The length of the word is
19 bits: 16 for the data and 3 for the address. The maximum clock frequency is
50 MHz.
AT84AD001B
37

Related parts for AT84AD001BCTD