PCA9540BDP PHILIPS [NXP Semiconductors], PCA9540BDP Datasheet - Page 4

• Manufacturer Part Number: PCA9540BDP
• Description: 2-channel I2C multiplexer
• Manufacturer: PHILIPS [NXP Semiconductors]

Philips Semiconductors
DEVICE ADDRESSING
Following a START condition the bus master must output the
address of the slave it is accessing. The address of the PCA9540B
is shown in Figure 3.
The last bit of the slave address defines the operation to be
performed. When set to logic 1, a read is selected while a logic 0
selects a write operation.
CONTROL REGISTER
Following the successful acknowledgement of the slave address,
the bus master will send a byte to the PCA9540B which will be
stored in the Control Register. If multiple bytes are received by the
PCA9540B, it will save the last byte received. This register can be
written and read via the I
CONTROL REGISTER DEFINITION
A SCx/SDx downstream pair, or channel, is selected by the contents
of the control register. This register is written after the PCA9540B
has been addressed. The 2 LSBs of the control byte are used to
determine which channel is to be selected. When a channel is
selected, the channel will become active after a stop condition has
been placed on the I
be in a HIGH state when the channel is made active, so that no
false conditions are generated at the time of connection.
Table 1. Control Register; Write — Channel Selection/
Read — Channel Status
2004 Sep 29
D7
X
X
X
X
0
2-channel I
D6
X
X
X
X
0
D5
X
X
X
X
0
X
1
7
D4
X
X
X
X
0
1
ENABLE BIT
X
6
Figure 4. Control register
2
Figure 3. Slave address
C bus. This ensures that all SCx/SDx lines will
2
1
D3
X
X
X
X
X
0
C multiplexer
5
2
C bus.
FIXED
0
X
B2
4
0
1
1
1
0
0
3
X
CHANNEL SELECTION BITS
B1
X
0
0
1
0
0
B2
2
(READ/WRITE)
B0
0
X
0
1
X
0
1
B1
R/W
No channel selected
Channel 0 enabled
Channel 1 enabled
No channel selected
No channel selected;
power-up default state
B0
0
COMMAND
SW00713
SW00839
4
POWER-ON RESET
When power is applied to V
the PCA9540B in a reset condition until V
this point, the reset condition is released and the PCA9540B
registers and I
all zeroes causing all the channels to be deselected. Thereafter,
V
VOLTAGE TRANSLATION
The pass gate transistors of the PCA9540B are constructed such
that the V
will be passed from one I
Figure 5 shows the voltage characteristics of the pass gate
transistors (note that the graph was generated using the data
specified in the DC Characteristics section of this datasheet). In
order for the PCA9540B to act as a voltage translator, the V
voltage should be equal to, or lower than the lowest bus voltage. For
example, if the main bus was running at 5 V, and the downstream
buses were 3.3 V and 2.7 V, then V
2.7 V to effectively clamp the downstream bus voltages. Looking at
Figure 5, we see that V
PCA9540B supply voltage is 3.5 V or lower so the PCA9540B
supply voltage could be set to 3.3 V. Pull-up resistors can then be
used to bring the bus voltages to their appropriate levels (see Figure
12).
More Information can be found in Application Note AN262 PCA954X
family of I
DD
V
pass
must be lowered below 0.2 V to reset the device.
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
2.0
DD
2
C/SMBus multiplexers and switches.
voltage can be used to limit the maximum voltage that
2
C state machine are initialized to their default states,
2.5
Figure 5. V
TYPICAL
pass
3.0
2
C bus to another.
DD
(max.) will be at 2.7 V when the
V
, an internal Power-On Reset holds
pass
MAXIMUM
3.5
pass
vs. V
pass
DD
voltage
V
should be equal to or below
4.0
DD
DD
has reached V
PCA9540B
4.5
Product data sheet
MINIMUM
5.0
SW00820
POR
pass
. At
5.5