WMS7201050M WINBOND [Winbond], WMS7201050M Datasheet - Page 12

no-image

WMS7201050M

Manufacturer Part Number
WMS7201050M
Description
256-TAP QUAD-CHANNEL NON-VOLATILE DIGITAL POTENTIOMETER
Manufacturer
WINBOND [Winbond]
Datasheet
CLK
SD
CS
SDO SDI must be valid on the rising edge of the clock SDO is valid on the falling edge of the clock or
R/B
A3 and A2 are the address bits that decide which NVMEM memory to be accessed, as shown in the
table below.
D7-D0 are the data values to be loaded into the Tap Register to set the wiper position, while D8 is
used to set the output mode. D8 has to be loaded into the NVMEM0~3 first and then the “Load Tap
Register” command (#6) has be executed to load D8 into the output-selection MUX to set the output
mode. D8=0 sets the output to Buffer Off mode while D8=1 sets to Buffer On mode.
Note:
I
7.7. I
A multiple of 24 bits must always be sent or the
command will not be valid
Bits marked ‘x’ are don’t care bits.
C3
`
1 2 3 4 5 6 7 8 9 1
NSTRUCTION
C2 C1 C0 A3 A2 A1 A0 x
CS is taken LOW
before command
starts
[A1 A0]
Channel
S
TABLE 3 – A1 AND A0 ADDRESS BIT DECODE TABLE
TABLE 4 – A3 AND A2 ADDRESS BIT DECODE TABLE
ET
[A3 A2]
NVMEM
FIGURE 5 – SPI COMMAND WAVEFORMS
[0 0]
0
0
x x x
1
1
[0 0]
0
1
2
- 12 -
1
3
x x
[0 1]
1
[0 1]
1
1
4
CS
1
5
x D8 D7 D6 D5 D4 D3 D2 D1 D0
R/B goes LOW at completion of commands
2, 4, 5, 6 and 7 to allow NVMEM to program
for T
HIGH after command is sent.
1
6
[1 0]
2
SV
1
7
[1 0]
2
. For other commands, R/B stays
1
8
CS is taken HIGH
after command is
sent
[1 1]
3
1
9
2
0
[1 1]
3
2
1
2
2
WMS7204
2
3
2
4

Related parts for WMS7201050M