EPF10K100 ALTERA [Altera Corporation], EPF10K100 Datasheet - Page 9
EPF10K100
Manufacturer Part Number
EPF10K100
Description
Embedded Programmable Logic Device Family
Manufacturer
ALTERA [Altera Corporation]
Datasheet
1.EPF10K100.pdf
(128 pages)
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Altera Corporation
Figure 1. FLEX 10K Device Block Diagram
I/O Element
(IOE)
Column
Interconnect
Row
Interconnect
Logic
Array
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
FLEX 10K devices provide six dedicated inputs that drive the flipflops’
control inputs to ensure the efficient distribution of high-speed, low-skew
(less than 1.5 ns) control signals. These signals use dedicated routing
channels that provide shorter delays and lower skews than the FastTrack
Interconnect. Four of the dedicated inputs drive four global signals. These
four global signals can also be driven by internal logic, providing an ideal
solution for a clock divider or an internally generated asynchronous clear
signal that clears many registers in the device.
Embedded Array Block
The EAB is a flexible block of RAM with registers on the input and output
ports, and is used to implement common gate array megafunctions. The
EAB is also suitable for functions such as multipliers, vector scalars, and
error correction circuits, because it is large and flexible. These functions
can be combined in applications such as digital filters and
microcontrollers.
IOE
IOE
FLEX 10K Embedded Programmable Logic Device Family Data Sheet
IOE
IOE
IOE
IOE
Embedded Array Block (EAB)
IOE
IOE
Embedded Array
EAB
EAB
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
IOE
Logic Array
Block (LAB)
Logic Array
Local Interconnect
Logic Element (LE)
9