MC34704 FREESCALE [Freescale Semiconductor, Inc], MC34704 Datasheet - Page 29

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MC34704

Manufacturer Part Number
MC34704
Description
Multiple Channel DC-DC Power Management IC
Manufacturer
FREESCALE [Freescale Semiconductor, Inc]
Datasheet

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RST OUTPUT SIGNAL PIN
output that should be connected to the reset input of the
microprocessor. An external pull up resistor should be
connected to this output and is recommended to be pulled up
to V2 for best performance (If this pin is pulled up to the VIN
pin, then the 1µA shutdown current budget is not guaranteed)
processor in “reset”. When VG, REG2, REG3, and REG4 are
all in regulation (both OV and UV flags for each regulator are
de-asserted) and no faults exist, the RST output is de-
asserted after a 10ms delay to take the processor out of
reset. Then the processor can go through its own internal
power up sequence and can start communicating to the rest
of the system.
faults: over-temperature, short-circuit, over-current for more
than 10ms, over-voltage in response A, under-voltage in
response A, or is shutting down normally, the RST output is
asserted to put the processor back in reset. If ANY of the
above four regulators has an over-voltage response B fault or
an under-voltage response B fault, the RST output will not be
asserted (only the OV and UV flags will be available for the
microprocessor to read).
THERMAL LIMIT DETECTION
It uses an external MOSFET.
CURRENT LIMIT MONITORING
• A soft over-current limit (over-current limit): If the peak
Analog Integrated Circuit Device Data
Freescale Semiconductor
This is a power reset output signal. It is an open drain
At power up, the RST pin is asserted (low) to keep the
If ANY of the above four regulators has any of the following
There is a thermal sensor for each regulator except REG7.
The current limit circuitry has two levels of current limiting:
current reaches the typical over-current limit, the switcher
will start a cycle-by-cycle operation to limit the current and
a 10ms current limit timer starts. The switcher will stay in
this mode of operation until one of the following occurs:
During this time, the processor can abort the shutdown
process or shutdown immediately before the 2nd period
elapses with an I
1
0
Turn On
2
C command
Figure 6. Hardware Power Up/Down Timing
Shutdown Delay
Programmable
1
st
1
st
Period
Period
Shutdown Flag Asserted
• A hard over-current limit (short circuit limit) that is higher
OUTPUT OVER-VOLTAGE/UNDER-VOLTAGE
MONITORING
user has two options that can be programmed through the
I
the 34704 would alert the processor through I
event happened.
34704 communicates to the processor that an over-voltage/
under-voltage condition has occurred and wait for the
processor decision to either shutoff or not, in the mean time
the control loop will try to fix itself.
implemented.
DVSSTAT flag is asserted “Done”.
soft start is done, the OV/UV protection is masked from
reporting that the output is in regulation.
2
C interface:
• The current is reduced back to the normal level inside
• The output reaches the thermal shutdown limit and
• The current limit timer expires without gaining normal
• The output current keeps increasing until it reaches the
than the cycle by cycle limit at which the device reacts by
shutting down the output immediately. This is necessary to
prevent damage in case of a short-circuit. After that, only
GrpB will attempt a one time retry after a timeout period of
10ms and will go through a new soft start cycle
In the case of an output over-voltage/under-voltage, the
Response A: The output will switch off automatically and
Response B: The output will not switch off. Rather the
To avoid erroneous conditions, a 20μs filter will be
The OV/UV fault flag is masked during DVS until
To keep the RST output low during ramp up and until the
ON/OFF Pin can be released during this
period without affecting the device response process
the 10ms timer and in this case normal operation is
gained back
turns off
operation at which point the output turns off. Then only
for GrpB, at the end of a timeout period of 10ms, the
output will attempt to restart again but for one time only.
second over-current limit, see below for more details
2
Shutdown Delay
Programmable
nd
2
Period
st
Period
Shutdown if No Processor Communication
FUNCTIONAL DEVICE OPERATION
OPERATIONAL MODES
2
C that such an
34704
29

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