ISL6256 INTERSIL [Intersil Corporation], ISL6256 Datasheet - Page 21

• Manufacturer Part Number: ISL6256
• Description: Highly Integrated Battery Charger with Automatic Power Source Selector for Notebook Computers
• Manufacturer: INTERSIL [Intersil Corporation]

ICOMP
The compensation capacitor (C
amplifier (GMI) a pole at a very low frequency (<<1Hz) and a
a zero at f
ICOMP. The frequency of can be calculated from Equation 33.
Placing this zero at a frequency equal to the pole calculated
in Equation 31 will result in maximum gain at low frequencies
and phase margin near 90°. If the zero is at a higher
frequency (smaller C
the phase margin will be lower. Use a capacitor on ICOMP
that is equal to or greater than the value calculated in
Equation 34:
C
A filter should be added between R
to reduce switching noise. The filter roll off frequency should
be between the crossover frequency and the switching
frequency (~100kHz). R
minimize offsets due to leakage current into CSOP. The filter
cut off frequency is calculated using Equation 35:
The crossover frequency is determined by the DC gain of the
modulator and output filter and the pole in Equation 31. The
DC gain is calculated in Equation 36 and the crossover
frequency is calculated with Equation 37.
The Bode plot of the loop gain, the compensator gain and
the power stage gain is shown in Figure 20.
f
f
A
f
ZERO
FILTER
CO
ICOMP
DC
=
=
C
Σ
A
=
ICOMP
--------------------------------------------------------------------------------------------------------- -
(
R
DC
FIGURE 19. CHARGE CURRENT LIMIT LOOP
=
=
---------------------------------------
(
Z1
S2
2π C
------------------------------------------ -
(
----------------------------------------------------------------------------------------- -
(
⋅
. f
2π C
R
f
4 gm2
+
11
⋅
POLE1
S2
Z1
0.25
⋅
r
⋅
gm2
DS ON
ICOMP
is created by the 0.25*CA2 output added to
+
PHASE
F2
+
-
-
+
1
(
r
DS ON
⋅
4
=
R
ICOMP
(
)
11 R
⋅
)
CHLIM
F2
+
11 R
--------------------- -
(
50μA V
2π L
F2
R
⋅
R FET_r
)
)
⋅
DCR
+
should be small (<10Ω) to
⋅
S2
), the DC gain will be higher but
R
S2
CA2
21
gm2
⁄
DCR
20
+
ICOMP
DS(ON)
)
R
+
-
BATTERY
+
=
+
S2
-
R
50μA V
CSOP
CSON
BAT
) gives the error
and CSOP and CSON
L
)
⁄
)
R
L_DCR
C F2
R
C O
ESR
R
F2
ISL6256, ISL6256A
(EQ. 35)
(EQ. 33)
(EQ. 34)
(EQ. 37)
(EQ. 36)
R
R
S2
BAT
:
Adapter Current Limit Control Loop
If the combined battery charge current and system load
current draws current that equals the adapter current limit
set by the ACLIM pin, ISL6256 will reduce the current to the
battery and/or reduce the output voltage to hold the adapter
current at the limit. Above the adapter current limit, the
minimum current buffer equals the output of gm3 and
ICOMP controls the charger output. Figure 21 shows the
adapter current limit control loop.
.
The loop response equations, bode plots and the selection
of C
with loop gain reduced by the duty cycle and the ratio of
R
D = 50%, the loop gain will be 6dB lower than the loop gain
in Figure 21. This gives lower crossover frequency and
higher phase margin in this mode. If R
duty cycle is 50% then the adapter current loop gain will be
identical to the gain in Figure 21.
S1
DCIN
ICOMP
/R
FIGURE 20. CHARGE CURRENT LOOP BODE PLOTS
-20
-40
-60
60
40
20
S2
R
C
0.01k
0
C
S1
F1
FIGURE 21. ADAPTER CURRENT LIMIT LOOP
ICOMP
. In other words, if R
are the same as the charge current control loop
ICOMP
CSIN
CSIP
R
F1
Σ
0.1k
f
POLE1
11
+
-
20
gm3
0.25
FREQUENCY (Hz)
CA1
-
+
PHASE
+
-
1k
f
ZERO
S1
ACLIM
R FET_r
= R
f
FILTER
CA2
20
S2
f
+
-
POLE2
10k
DS(ON)
S1
and the duty cycle
+
-
CSON
CSOP
/R
COMPENSATOR
MODULATOR
LOOP
S2
L
100k
= 2 and the
September 14, 2010
R
C
R
C
L_DCR
F2
ESR
O
R
F2
FN6499.3
1M
R