ISL6334 INTERSIL [Intersil Corporation], ISL6334 Datasheet - Page 19

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ISL6334

Manufacturer Part Number
ISL6334
Description
VR11.1, 4-Phase PWM Controller with Light Load Efficiency Enhancement and Load Current Monitoring
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet

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The regulated output voltage is reduced by the droop voltage
V
derived by combining Equation 8 with the appropriate
sample current expression defined by the current sense
method employed, as shown in Equation 9:
where V
programmed offset voltage, I
of the converter, R
the ISEN+ pin, and R
active channel number, and R
depending on the sensing method.
Therefore, the equivalent loadline impedance, i.e. Droop
impedance, is equal to Equation 10:
Output-Voltage Offset Programming
The ISL6334, ISL6334A allows the designer to accurately
adjust the offset voltage. When a resistor, R
connected between OFS to VCC, the voltage across it is
regulated to 1.6V. This causes a proportional current (I
to flow into OFS. If R
across it is regulated to 0.4V, and I
resistor between DAC and REF, R
the product (I
voltage. These functions are shown in Figure 7.
V
R
DROOP
OUT
LL
FIGURE 7. OUTPUT VOLTAGE OFFSET PROGRAMMING
=
=
------------
R
REF
. The output voltage as a function of load current is
N
V
FB
1.6V
REF
----------------- -
R
is the reference voltage, V
OFS
ISEN
VCC
R
+
-
X
V
OFS
x R
ISEN
0.4V
OFS
E/A
FB
OFS
GND
is the sense resistor connected to
+
-
I
---------------- -
is the feedback resistor, N is the
LOAD
is connected to ground, the voltage
) is equal to the desired offset
N
FB
LOAD
19
X
----------------- - R
R
is the DCR, or R
ISEN
R
ISL6334, ISL6334A
REF
X
OFS
is the total output current
DYNAMIC
VID D/A
, is selected so that
OFS
FB
flows out of OFS. A
OFS
is the
, is
SENSE
OFS
DAC
ISL6334, ISL6334A
GND
VCC
OR
(EQ. 10)
(EQ. 9)
OFS
REF
R
R
C
REF
OFS
REF
)
Once the desired output offset voltage has been determined,
use Equations 11 and 12 to calculate R
For Positive Offset (connect R
For Negative Offset (connect R
Dynamic VID
Modern microprocessors need to make changes to their
core voltage as part of normal operation. They direct the
core-voltage regulator to do this by making changes to the
VID inputs during regulator operation. The power
management solution is required to monitor the DAC inputs
and respond to on-the-fly VID changes in a controlled
manner. Supervising the safe output voltage transition within
the DAC range of the processor without discontinuity or
disruption is a necessary function of the core-voltage
regulator.
In order to ensure the smooth transition of output voltage
during VID change, a VID step change smoothing network,
composed of R
used. The selection of R
voltage as detailed in “Output-Voltage Offset Programming”
on page 19. The selection of C
duration for 1-bit VID change and the allowable delay time.
Assuming the microprocessor controls the VID change at
1-bit every t
of R
During dynamic VID transition and VID steps up, the
overcurrent trip point increases by 140% to avoid falsely
triggering OCP circuits, while the overvoltage trip point is set
to its maximum VID OVP trip level. If the dynamic VID occurs
at PSI# asserted, the system should exit PSI# and complete
the transition, and then resume PSI# operation 50µs after
the transition.
Operation Initialization
Prior to converter initialization, proper conditions must exist
on the enable inputs and VCC. When the conditions are met,
the controller begins soft-start. Once the output voltage is
within the proper window of operation, VR_RDY asserts
logic high.
Enable and Disable
While in shutdown mode, the PWM outputs are held in a
high-impedance state to assure the drivers remain off. The
following input conditions must be met before the ISL6334,
ISL6334A is released from shutdown mode.
R
C
R
REF
OFS
OFS
REF
R
=
=
REF
and C
1.6
----------------------------- -
0.4
----------------------------- -
V
V
OFFSET
OFFSET
VID
×
×
=
R
R
REF
REF
, the relationship between the time constant
t
REF
REF
VID
network and t
and C
REF
REF
is based on the desired offset
, as shown in Figure 7, can be
OFS
REF
OFS
VID
to VCC):
is based on the time
to GND):
is given by Equation 13.
OFS
:
February 26, 2008
(EQ. 11)
(EQ. 12)
(EQ. 13)
FN6482.0

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