FIN3385_12 FAIRCHILD [Fairchild Semiconductor], FIN3385_12 Datasheet - Page 16

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FIN3385_12

Manufacturer Part Number
FIN3385_12
Description
Low-Voltage, 28-Bit, Flat-Panel Display Link Serializer / Deserializer
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
© 2003 Fairchild Semiconductor Corporation
FIN3385 / FIN3386 • Rev. 1.0.6
Note:
22. The information in this diagram shows the difference between clock out and the first data bit. A 2-bit cycle delay
Note:
23. This output date pulse position works for both transmitters with 21 TTL inputs, except the LVDS output bit
AC Loadings and Waveforms
is guaranteed when the MSB is output from the transmitter.
mapping difference. Two-bit cycle delay is guaranteed with the MSB is output from transmitter.
Figure 18. 28 Parallel LVTTL Inputs Mapped to Four Serial LVDS Outputs
Figure 19. 21 Parallel LVTTL Inputs Mapped to Three Serial Outputs
Figure 16. Transmitter Power-Down Delay
Figure 17. Receiver Power-Down Delay
(Continued)
16
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