ADL5802_09 AD [Analog Devices], ADL5802_09 Datasheet - Page 24

• Manufacturer Part Number: ADL5802_09
• Description: Dual Channel, High IP3, 100 MHz to 6 GHz Active Mixer
• Manufacturer: AD [Analog Devices]

ADL5802
CIRCUIT DESCRIPTION
The ADL5802 provides two double-balanced active mixers.
These mixers are designed for a 50 Ω input impedance and a
200 Ω output impedance. Both are driven from a common local
oscillator (LO) amplifier. The RF inputs and LO outputs are
differential, providing maximum usable bandwidth at the input
and output ports. The LO also operates with a 50 Ω input
impedance and can, optionally, be operated differentially or
single-ended. The input, output, and LO ports can be operated
over an exceptionally wide frequency range. The ADL5802 can
be configured as a downconvert mixer or as an upconvert mixer.
The ADL5802 can be divided into the following sections: the
local oscillator (LO) amplifier and splitter, the RF voltage-to-
current (V-to-I) converter, the mixer cores, the output loads,
and the bias circuit. A simplified block diagram of the device is
shown in Figure 67. The LO block generates a pair of differential
LO signals to drive two mixer cores. The RF input is converted
into current by the V-to-I converters that then feed into the two
mixer cores. The internal differential load of the mixers is
designed for a wideband 200 Ω output impedance from the
mixer. Reference currents to each section are generated by the
bias circuit, which can be enabled or disabled using the ENBL
pin. A detailed description of each section of the ADL5802
follows.
LO AMPLIFIER AND SPLITTER
The LO input is amplified using a broadband LNA and is then
split and followed by separate LO limiting amplifiers. The LNA
input impedance is nominally 50 Ω. The LO is designed to
accommodate a wide range of LO input power levels. The LO
input is conditioned by the series of amplifiers to provide a well
controlled and limited LO swing to the mixer core, resulting in
excellent IP3. The LO circuit exhibits low additive noise,
resulting in an excellent mixer noise figure and output noise
under RF blocking. For optimal performance, the LO inputs
should be driven differentially but at lower frequencies; single-
ended drive is acceptable.
VPOS
OP1+
OP1–
GND
GND
GND
1
2
3
4
5
6
Figure 67. ADL5802 Block Diagram
ADL5802
VPOS
ENBL
24
7
GND
RF1+
23
8
RF1–
LOIP LOIN
22
9
GND
21
10
RF2+
GND VSET
20
11
BIAS
RF2–
IP3
12
19
18
17
16
15
14
13
GND
GND
OP2+
OP2–
GND
VPOS
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RF VOLTAGE TO CURRENT (V-TO-I) CONVERTER
The differential RF input signal is applied to a voltage-to-current
converter that converts the differential input voltage to output
currents. The V-to-I converter provides a 50 Ω input
impedance. The V-to-I section bias current can be adjusted up
or down using the VSET pin. Adjusting the current up improves
IP3 and P1dB input but degrades SSB NF. Adjusting the current
down improves SSB NF but degrades IP3 and P1dB input. The
conversion gain remains nearly constant over a wide range of
VSET pin settings, allowing the part to be adjusted dynamically
without affecting the conversion gain. The current adjustment
can be made by connecting a resistor from the VSET pin to the
positive supply to increase the bias current or from the VSET
pin to ground to decrease the bias current. The VSET pin
impedance is approxi-mately 675 Ω in series with two diodes
and an internal current source.
MIXER CORES
The ADL5802 has two double-balanced mixers that use high
performance SiGe NPN transistors. These mixers are based on
the Gilbert cell design of four cross-connected transistors.
MIXER LOAD
Each mixer load is designed to use a pair of 100 Ω resistors con-
nected to the positive supply. This provides a 200 Ω differential
output resistance. The mixer output should be pulled to the
positive supply externally using a pair of RF chokes or using an
output transformer with the center tap connected to the positive
supply. It is possible to exclude these components when the mixer
core current is low, but both P1dB and IP3 are then reduced.
The mixer load output can operate from direct current (dc) up to
approximately 500 MHz into a 200 Ω load. For upconversion
applications, the mixer load can be matched using off-chip
matching components. Transmit operation up to 2 GHz is
possible. See the Applications Information section for matching
circuit details.
BIAS CIRCUIT
A band gap reference circuit generates the reference currents
used by the mixers. The bias circuit can be enabled and disabled
using the ENBL pin. If the ENBL pin is grounded or left open,
the part is enabled. Pulling the ENBL pin high shuts off the bias
circuit and disables the part. However, the ENBL pin does not
alter the current in the LO section and, therefore, does not
provide a true power-down feature. Certain configurations may
require the VSET pin to be connected to the positive supply
through a resistor. This will result in an increased mixer core
current. Unless this resistor to positive supply is removed, bias
current will continue to be supplied to the mixer core.