X98021_06 INTERSIL [Intersil Corporation], X98021_06 Datasheet - Page 5

• Manufacturer Part Number: X98021_06
• Description: 210MHz Triple Video Digitizer with Digital PLL
• Manufacturer: INTERSIL [Intersil Corporation]

Electrical Specifications
NOTES:
AC TIMING CHARACTERISTICS (2 WIRE INTERFACE)
1. Setup and hold times are at a 140MHz DATACLK rate.
SYMBOL
t
t
t
t
t
t
HD:DAT
SU:STO
SU:STA
HD:STA
SU:DAT
SETUP
t
t
t
HOLD
f
t
HIGH
LOW
SDA OUT
BUF
t
SCL
t
AA
DH
SDA IN
SCL
DATA valid before rising edge of DATACLK 15pF DATACLK load, 15pF DATA load
DATA valid after rising edge of DATACLK
SCL Clock Frequency
Maximum width of a glitch on SCL that will
be suppressed
SCL LOW to SDA Data Out Valid
Time the bus must be free before a new
transmission can start
Clock LOW Time
Clock HIGH Time
Start Condition Setup Time
Start Condition Hold Time
Data In Setup Time
Data In Hold Time
Stop Condition Setup Time
Data Output Hold Time
t
SU:ST
PARAMETER
t
HD:STA
5
Specifications apply for V
unless otherwise noted (Continued)
t
F
t
SU:DAT
FIGURE 1. 2 WIRE INTERFACE TIMING
t
HIGH
15pF DATACLK load, 15pF DATA load
(Note 1)
(Note 1)
2 XTAL periods min
5 XTAL periods plus SDA’s RC time
constant
4 XTAL periods min
A
= V
D
X98021
= V
t
LOW
X
COMMENT
t
= 3.3V, pixel rate = 210MHz, f
HD:DAT
t
R
t
AA
t
DH
XTAL
MIN
100
160
1.3
2.0
1.3
1.3
0.6
0.6
0.6
0.6
80
0
0
= 25MHz, T
t
TYP
BUF
A
= 25°C,
t
SU:STO
comment
MAX
See
400
March 8, 2006
UNIT
FN8219.3
kHz
ns
ns
ns
µs
µs
µs
µs
µs
µs
ns
ns
µs
ns