74ACT373M STMICROELECTRONICS [STMicroelectronics], 74ACT373M Datasheet

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74ACT373M

Manufacturer Part Number
74ACT373M
Description
OCTAL D-TYPE LATCH WITH 3 STATE OUTPUT NON INVERTING
Manufacturer
STMICROELECTRONICS [STMicroelectronics]
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74ACT373MSAX
Manufacturer:
SANYO
Quantity:
390
Part Number:
74ACT373MSAX
Manufacturer:
FAIRCHILD/仙童
Quantity:
20 000
DESCRIPTION
The ACT373 is an advanced high-speed CMOS
OCTAL D-TYPE LATCH with 3 STATE OUTPUT
NON INVERTING fabricated with sub-micron
silicon gate and double-layer metal wiring C
technology. It is ideal for low power applications
mantaining high speed operation similar to
equivalent Bipolar Schottky TTL.
These 8 bit D-Type latch are controlled by a latch
enable input (LE) and an output enable input
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 1997
HIGH SPEED: t
LOW POWER DISSIPATION:
I
COMPATIBLE WITH TTL OUTPUTS
V
50 TRANSMISSION LINE DRIVING
CAPABILITY
SYMMETRICAL OUTPUT IMPEDANCE:
|I
BALANCED PROPAGATION DELAYS:
t
OPERATING VOLTAGE RANGE:
V
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 373
IMPROVED LATCH-UP IMMUNITY
CC
PLH
OH
IH
CC
= 8 A (MAX.) at T
| = I
= 2V (MIN), V
(OPR) = 4.5V to 5.5V
t
PHL
OL
= 24 mA (MIN)
PD
IL
= 6 ns (TYP.) at V
= 0.8V (MAX)
A
= 25
WITH 3 STATE OUTPUT NON INVERTING
o
C
CC
= 5V
2
MOS
(OE).
While the LE inputs is held at a high level, the Q
outputs will follow the data input precisely or
inversely. When the LE is taken low, the Q
outputs will be latched precisely or inversely at
the logic level of D input data. While the (OE)
input is low, the 8 outputs will be in a normal logic
state (high or low logic level) and while high level
the outputs will be in a high impedance state.
This device is designed to interface directly High
Speed CMOS systems with TTL and NMOS
components.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
(Plastic Package)
74ACT373B
OCTAL D-TYPE LATCH
B
ORDER CODES :
74ACT373
(Micro Package)
74ACT373M
M
1/10

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74ACT373M Summary of contents

Page 1

... This device is designed to interface directly High Speed CMOS systems with TTL and NMOS 2 MOS components. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. 74ACT373 M (Micro Package) 74ACT373M 1/10 ...

Page 2

INPUT AND OUTPUT EQUIVALENT CIRCUIT TRUTH TABLE INPUT DON’T CARE Z: HIGH IMPEDANCE *: Q OUTPUTS ARE LATCHED AT THE TIME WHEN THE LE INPUT IS TAKEN LOW LOGIC LEVEL. LOGIC DIAGRAMS ...

Page 3

ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Supply Voltage Input Voltage Output Voltage Input Diode Current Output Diode Current Output Current ...

Page 4

DC SPECIFICATIONS Symbol Parameter V High Level Input Voltage IH V Low Level Input Voltage IL V High Level Output OH Voltage V Low Level Output OL Voltage I Input Leakage Current State Output Leakage OZ ...

Page 5

AC ELECTRICAL CHARACTERISTICS (C Symbol Parameter t Propagation Delay Time PLH PHL t Propagation Delay Time PLH PHL t Output Enable Time PZL t PZH t Output Disable Time PLH t PHL ...

Page 6

TEST CIRCUIT TEST PLH PHL PZL PLZ PZH PHZ equivalent (includes jig and probe capacitance 500 or equivalent L 1 ...

Page 7

WAVEFORM 2: OUTPUT ENABLE AND DISABLE TIMES (f=1MHz; 50% duty cycle) WAVEFORM 3: PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle) 74ACT373 7/10 ...

Page 8

Plastic DIP20 (0.25) MECHANICAL DATA DIM. MIN. TYP. a1 0.254 B 1.39 b 0. 2.54 e3 22. 8/10 mm MAX. MIN. 0.010 1.65 0.055 25.4 8.5 7.1 3.93 3.3 1.34 ...

Page 9

SO20 MECHANICAL DATA mm DIM. MIN. TYP 0. 0.35 b1 0. 12.60 E 10.00 e 1.27 e3 11.43 F 7. inch MAX. MIN. TYP. 2.65 0.20 0.004 2.45 ...

Page 10

Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsabilit y for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may results ...

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