74ACT534_07 FAIRCHILD [Fairchild Semiconductor], 74ACT534_07 Datasheet

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74ACT534_07

Manufacturer Part Number
74ACT534_07
Description
Octal D-Type Flip-Flop with 3-STATE Outputs
Manufacturer
FAIRCHILD [Fairchild Semiconductor]
Datasheet
©1988 Fairchild Semiconductor Corporation
74ACT534 Rev. 1.4
FACT™ is a trademark of Fairchild Semiconductor Corporation.
74ACT534
Octal D-Type Flip-Flop with 3-STATE Outputs
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
Pin Descriptions
74ACT534SC
74ACT534SJ
D
CP
OE
O
I
Edge-triggered D-type inputs
Buffered positive edge-triggered clock
3-STATE outputs for bus-oriented applications
Outputs source/sink 24mA
ACT534 has TTL-compatible inputs
Inverted output version of ACT374
Pin Names
CC
Number
0
0
–D
–O
Order
and I
7
7
OZ
reduced by 50%
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
Complementary 3-STATE Outputs
Package
Number
M20B
M20D
Description
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
General Description
The ACT534 is a high-speed, low-power octal D-type
flip-flop featuring separate D-type inputs for each flip-flop
and 3-STATE outputs for bus-oriented applications. A
buffered Clock (CP) and Output Enable (OE) are com-
mon to all flip-flops. The ACT534 is the same as the
ACT374 except that the outputs are inverted.
Logic Symbols
Package Description
IEEE/IEC
www.fairchildsemi.com
April 2007
tm

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74ACT534_07 Summary of contents

Page 1

Octal D-Type Flip-Flop with 3-STATE Outputs Features ■ I and I reduced by 50 ■ Edge-triggered D-type inputs ■ Buffered positive edge-triggered clock ■ 3-STATE outputs for bus-oriented applications ■ Outputs source/sink 24mA ■ ACT534 has TTL-compatible ...

Page 2

Functional Description The ACT534 consists of eight edge-triggered flip-flops with individual D-type inputs and 3-STATE complemen- tary outputs. The buffered clock and buffered Output Enable are common to all flip-flops. The eight flip-flops will store the state of their individual ...

Page 3

Absolute Maximum Ratings Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure ...

Page 4

DC Electrical Characteristics Symbol Parameter V Minimum HIGH Level IH Input Voltage V Maximum LOW Level IL Input Voltage V Minimum HIGH Level OH Output Voltage V Maximum LOW Level OL Output Voltage I Maximum Input IN Leakage Current I ...

Page 5

AC Electrical Characteristics Symbol Parameter f Maximum Clock Frequency MAX t Propagation Delay PLH t Propagation Delay PHL t Output Enable Time PZH t Output Enable Time PZL t Output Disable Time PHZ Output ...

Page 6

Physical Dimensions Dimensions are in inches (millimeters) unless otherwise noted. Figure 2. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide ©1988 Fairchild Semiconductor Corporation 74ACT534 Rev. 1.4 Package Number M20B 6 www.fairchildsemi.com ...

Page 7

Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 3. 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1988 Fairchild Semiconductor Corporation 74ACT534 Rev. 1.4 Package Number M20D 7 www.fairchildsemi.com ...

Page 8

TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world. ActiveArray Bottomless Build ...

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