AT24C512-10PC-1.8 ATMEL [ATMEL Corporation], AT24C512-10PC-1.8 Datasheet

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AT24C512-10PC-1.8

Manufacturer Part Number
AT24C512-10PC-1.8
Description
2-wire Serial EEPROM
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
Pin Configurations
Pin Name
A0 - A1
SDA
SCL
WP
NC
Features
Description
The AT24C512 provides 524,288 bits of serial electrically erasable and programmable
read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device’s
cascadable feature allows up to 4 devices to share a common 2-wire bus. The device
is optimized for use in many industrial and commercial applications where low-power
and low-voltage operation are essential. The devices are available in space-saving
8-pin PDIP, 20-pin JEDEC SOIC, 8-pin Leadless Array (LAP), and 8-ball dBGA pack-
ages. In addition, the entire family is available in 5.0V (4.5V to 5.5V), 2.7V (2.7V to
5.5V) and 1.8V (1.8V to 3.6V) versions.
GND
Low-voltage and Standard-voltage Operation
Internally Organized 65,536 x 8
2-wire Serial Interface
Schmitt Triggers, Filtered Inputs for Noise Suppression
Bidirectional Data Transfer Protocol
1 MHz (5V), 400 kHz (2.7V) and 100 kHz (1.8V) Compatibility
Write Protect Pin for Hardware and Software Data Protection
128-byte Page Write Mode (Partial Page Writes Allowed)
Self-timed Write Cycle (5 ms Typical)
High Reliability
Automotive Grade and Extended Temperature Devices Available
8-pin PDIP and 20-pin JEDEC SOIC, 8-pin LAP, and 8-ball dBGA
NC
NC
NC
NC
NC
NC
NC
A0
A1
– 5.0 (V
– 2.7 (V
– 1.8 (V
– Endurance: 100,000 Write Cycles
– Data Retention: 40 Years
– ESD Protection: >4000V
1
2
3
4
5
6
7
8
9
10
20-pin SOIC
CC
CC
CC
Function
Address Inputs
Serial Data
Serial Clock Input
Write Protect
No Connect
= 4.5V to 5.5V)
= 2.7V to 5.5V)
= 1.8V to 3.6V)
20
19
18
17
16
15
14
13
12
11
VCC
WP
NC
NC
NC
NC
NC
NC
SCL
SDA
GND
VCC
SDA
8-pin Leadless Array
SCL
NC
WP
A0
A1
VCC
SDA
SCL
WP
Bottom View
Bottom View
8-ball dBGA
8
7
6
5
8-pin PDIP
1
2
3
4
8
7
6
5
1
2
3
4
8
7
6
5
1
2
3
4
A0
A1
NC
GND
TM
A0
A1
NC
GND
VCC
WP
SCL
SDA
Packages
2-wire Serial
EEPROM
512K (65,536 x 8)
AT24C512
Rev. 1116D–07/00
1

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AT24C512-10PC-1.8 Summary of contents

Page 1

... PDIP and 20-pin JEDEC SOIC, 8-pin LAP, and 8-ball dBGA Description The AT24C512 provides 524,288 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 65,536 words of 8 bits each. The device’s cascadable feature allows devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low-power and low-voltage operation are essential ...

Page 2

... If left unconnected internally pulled down to GND. Switching prior to a write operation cre- CC ates a software write protect function. Memory Organization AT24C512, 512K SERIAL EEPROM: The 512K is inter- nally organized as 512 pages of 128-bytes each. Random word addressing requires a 16-bit data word address. ...

Page 3

... 2. 5. 4 OUT AT24C512 = +1.8V. CC Max Units Conditions ° +70 ° +1.8V to +5.5V Min Typ Max 1.8 3.6 2.7 5.5 4.5 5.5 1.0 2.0 2.0 3.0 0.2 2.0 0.6 6.0 6.0 0.10 3.0 0.05 3 ...

Page 4

... EEPROM in 8-bit words. The EEPROM sends a zero during the ninth clock cycle to acknowledge that it has received each word. STANDBY MODE: The AT24C512 features a low power standby mode which is enabled: a) upon power-up and b) after the receipt of the STOP bit and the completion of any internal operations ...

Page 5

... Bus Timing (SCL: Serial Clock, SDA: Serial Data I/O) Write Cycle Timing (SCL: Serial Clock, SDA: Serial Data I/O) Note: 1. The write cycle time t WR cycle. is the time from a valid stop condition of a write sequence to the end of the internal clear/write AT24C512 (1) 5 ...

Page 6

... Data Validity Start and Stop Definition Output Acknowledge AT24C512 6 ...

Page 7

... Upon a compare of the device address, the EEPROM will output a zero compare is not made, the device will return to a standby state. DATA SECURITY: The AT24C512 has a hardware data protection scheme that allows the user to write protect the whole memory when the WP pin ...

Page 8

... Figure 1. Device Address Figure 2. Byte Write Figure 3. Page Write Figure 4. Current Address Read AT24C512 8 ...

Page 9

... Figure 5. Random Read Figure 6. Sequential Read AT24C512 9 ...

Page 10

... AT24C512W1-10SC 1000 AT24C512C1-10CI AT24C512-10PI AT24C512-10UI AT24C512W1-10SI 400 AT24C512C1-10CC-2.7 AT24C512-10PC-2.7 AT24C512-10UC-2.7 AT24C512W1-10SC-2.7 400 AT24C512C1-10CI-2.7 AT24C512-10PI-2.7 AT24C512-10UI-2.7 AT24C512W1-10SI-2.7 100 AT24C512C1-10CC-1.8 AT24C512-10PC-1.8 AT24C512-10UC-1.8 AT24C512W1-10SC-1.8 100 AT24C512C1-10CI-1.8 AT24C512-10PI-1.8 AT24C512-10UI-1.8 AT24C512W1-10SI-1.8 Package Type Options Package Operation Range 8C1 Commercial 8P3 (0°C to 70°C) 8U3 20S 8C1 ...

Page 11

... Wide, Plastic Gull Wing Small Outline (JEDEC SOIC) Dimensions in Inches and (Millimeters) SIDE VIEW 0.38 (0.015) 0.52 (0.020) AT24C512 .400 (10.16) .355 (9.02) PIN 1 .280 (7.11) .240 (6.10) .037 (.940) .027 (.690) .300 (7.62) REF .210 (5.33) MAX .100 (2.54) BSC ...

Page 12

Atmel Headquarters Corporate Headquarters 2325 Orchard Parkway San Jose, CA 95131 TEL (408) 441-0311 FAX (408) 487-2600 Europe Atmel U.K., Ltd. Coliseum Business Centre Riverside Way Camberley, Surrey GU15 3YL England TEL (44) 1276-686-677 FAX (44) 1276-686-697 Asia Atmel Asia, ...

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