25LC512-1/MF MICROCHIP [Microchip Technology], 25LC512-1/MF Datasheet

25LC512-1/MF

Manufacturer Part Number

25LC512-1/MF

Description

512 Kbit SPI Bus Serial EEPROM

Manufacturer

MICROCHIP [Microchip Technology]

Datasheet

1.25LC512-1MF.pdf (32 pages)

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Device Selection Table

Features:

• 20 MHz max. Clock Speed

• Byte and Page-level Write Operations

• Low-Power CMOS Technology

• Electronic Signature for Device ID

• Self-Timed Erase and Write cycles

• Sector Write Protection (16K byte/sector)

• Built-In Write Protection

• High Reliability

• Temperature Ranges Supported;

• Pb-free and RoHS Compliant

Pin Function Table

SCK

HOLD

- 128-byte page

- 5 ms max.

- No page or sector erase required

- Max. Write Current: 5 mA at 5.5V, 20 MHz

- Read Current: 10 mA at 5.5V, 20 MHz

- Standby Current: 1μA at 2.5V (Deep power-

- Page Erase (5 ms, typical)

- Sector Erase (10 ms/sector, typical)

- Bulk Erase (10 ms, typical)

- Protect none, 1/4, 1/2 or all of array

- Power-on/off data protection circuitry

- Write enable latch

- Write-protect pin

- Endurance: 1 Million erase/write cycles

- Industrial (I):

- Automotive (E):

Part Number

down)

Name

25LC512

25AA512

Chip Select Input

Serial Data Output

Write-Protect

Ground

Serial Data Input

Serial Clock Input

Hold Input

Supply Voltage

512 Kbit SPI Bus Serial EEPROM

2.5-5.5V

1.8-5.5V

Function

Range

-40°C to +85°C

-40°C to +125°C

Page Size

128 Byte

Preliminary

25AA512/25LC512

Description:

The Microchip Technology Inc. 25AA512/25LC512

(25XX512

byte-level and page-level serial EEPROM functions. It

also features Page, Sector and Chip erase functions

typically associated with Flash-based products. These

functions are not required for byte or page write opera-

tions. The memory is accessed via a simple Serial

Peripheral Interface (SPI) compatible serial bus. The

bus signals required are a clock input (SCK) plus sepa-

rate data in (SI) and data out (SO) lines. Access to the

device is controlled by a Chip Select (CS) input.

Communication to the device can be paused via the

hold pin (HOLD). While the device is paused, transi-

tions on its inputs will be ignored, with the exception of

Chip Select, allowing the host to service higher priority

interrupts.

The 25XX512 is available in standard packages includ-

ing 8-lead PDIP, SOIC, and advanced 8-lead DFN

package. All packages are Pb-free and RoHS

compliant.

Package Types (not to scale)

*25XX512 is used in this document as a generic part number

for the 25AA512, 25LC512 devices.

Temp. Ranges

I,E

) is a 512 Kbit serial EEPROM memory with

DFN

(MF)

HOLD

SCK

P, SN, SM, MF

Packages

PDIP/SOIC/SOIJ

(P, SN, SM)

DS22021B-page 1

HOLD

SCK

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