M27C64 STMICROELECTRONICS [STMicroelectronics], M27C64 Datasheet - Page 3

• Manufacturer Part Number: M27C64
• Description: 64 Kbit 8Kb x 8 UV EPROM and OTP EPROM
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

be used to gate data to the output pins, inde-
pendent of device selection. Assuming that the
addresses are stable, the address access time
(t
Data is available at the output after a delay of t
from the falling edge of G, assuming that E has
been low and the addresses have been stable for
at least t
Standby Mode
The M27C64A has a standby mode which reduces
the active current from 30mA to 100 A. The
M27C64A is placed in the standby mode by apply-
ing a CMOS high signal to the E input. When in the
standby mode, the outputs are in a high impedance
state, independent of the G input.
Two Line Output Control
Because EPROMs are usually used in larger mem-
ory arrays, this product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
For the most efficient use of these two control lines,
E should be decoded and used as the primary
device selecting function, while G should be made
a common connection to all devices in the array
and connected to the READ line from the system
Table 3. Operating Modes
Note: X = V
Table 4. Electronic Signature
AVQV
Manufacturer’s Code
Device Code
Read
Output Disable
Program
Verify
Program Inhibit
Standby
Electronic Signature
will not occur.
) is equal to the delay from E to output (t
Identifier
AVQV
IH
Mode
or V
-t
IL
, V
GLQV
ID
= 12V
.
0.5V
V
A0
V
IH
IL
V
V
V
V
V
V
V
E
IH
IH
IL
IL
IL
IL
IL
Q7
1
0
Q6
0
0
ELQV
V
V
V
V
V
G
X
X
GLQV
IH
IH
IL
IL
IL
Q5
).
0
0
V
control bus. This ensures that all deselected mem-
ory devices are in their low power standby mode
and that the output pins are only active when data
is required from a particular memory device.
System Considerations
The power switching characteristics of Advanced
CMOS EPROMs require careful decoupling of the
devices. The supply current, I
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
the falling and rising edges of E. The magnitude of
the transient current peaks is dependent on the
capacitive and inductive loading of the device at the
output.
The associated transient voltage peaks can be
suppressed by complying with the two line output
control and by properly selected decoupling ca-
pacitors. It is recommended that a 0.1 F ceramic
capacitor be used on every device between V
and V
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7 F bulk electrolytic capacitor should be used
between V
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB traces.
IL
Q4
1
0
V
V
V
V
Pulse
P
X
X
IH
IH
IH
IH
SS
. This should be a high frequency capacitor
Q3
1
1
CC
and V
V
A9
X
X
X
X
X
X
ID
Q2
0
0
SS
for every eight devices. The
Q1
1
0
V
V
V
V
V
V
V
V
PP
CC
CC
PP
PP
PP
CC
CC
CC
Q0
, has three seg-
1
0
M27C64A
Data Out
Data Out
Q0 - Q7
Hex Data
Data In
Codes
Hi-Z
Hi-Z
Hi-Z
9Bh
08h
3/12
CC