M58WR064 STMICROELECTRONICS [STMicroelectronics], M58WR064 Datasheet - Page 81

• Manufacturer Part Number: M58WR064
• Description: 64 Mbit 4Mb x 16, Multiple Bank, Burst 1.8V Supply Flash Memory
• Manufacturer: STMICROELECTRONICS [STMicroelectronics]

REVISION HISTORY
Table 44. Document Revision History
19-Feb-2003
08-Apr-2002
20-Jun-2002
21-Oct-2002
Date
Version
-01
-02
2.1
3.0
First Issue
Part number modified, Synchronous Burst Frequency modified, description of the
Automatic Standby mode added.
Hexadecimal Code for Quadruple Word Program Setup modified.
Double/Quadruple Word Program command descriptions modified.
Description of the Verify Phase in the Enhanced Factory Program command and the
Exit Phase in the Quadruple Enhanced Factory Program command modified.
Parameters in Tables 6, 7, 8, 18, 20, 21, 22, 23, 24, 33, 39, 40, 41 and 43 modified
and/or specified. Figures 4, 7, 12, 13, 15, 16, 17 and 23 modified. Figure 14 added.
Revision numbering modified: a minor revision will be indicated by incrementing the
digit after the dot, and a major revision, by incrementing the digit before the dot
(revision version 02 equals 2.0).
Revision history moved to end of document.
Bank numbering modified; Figures 21, 22, 23, 24, 27, 28 and 29 modified. 1st Cycle
Addresses modified in Table 5 and note to Figure 13, modified.
“Read Status Register Command”, “Program/Erase Suspend Command”, “Set
Configuration Register Command”, “Double Word Program Command”, “Quadruple
Word Program Command”, “Enhanced Factory Program Command”, “Quadruple
Enhanced Factory Program Command”, “Erase Status Bit (SR5)”, “Wait
Configuration Bit (CR8)”, “Asynchronous Read Mode”, “Synchronous Burst Read
Mode” and “Single Synchronous Read Mode” paragraphs clarified.
Default values added to Table 9; Figure 19, VFBGA56 Daisy Chain - Package
Connections (Top view through package), Figure 20, VFBGA56 Daisy Chain - PCB
Connection Proposal (Top view through package) and Table 27, Daisy Chain
Ordering Scheme added.
Notes added to Figures 12, 21, 22, 23, 24, 27, and 28 and Table 14.
85ns Speed Class removed, 80ns Speed Class added.
70ns Speed Class characterized (certain timings modified).
Document promoted from Product Preview to full Datasheet status.
Automatic Standby mode explained under Asynchronous Read Mode. Minor text
changes in Clear Status Register Command, Quadruple Enhanced Factory Program
Command and Synchronous Burst Read Mode.
Bank Erase Command moved from the Standard to the Factory Program
Commands. Number of Bank Erase cycles limited to 100. Erase replaced by Block
Erase in Tables 11 and 12, Dual Operations Allowed in Other Banks and the Same
Bank, respectively.
Overbar removed from WAIT signal in all AC Waveform Figures. Latch Enable
waveform modified in Figure 11, Asynchronous Page Read AC Waveforms.
V
AC Characteristics: for V
in Table 21, were changed; for V
t
Values corrected in Table 25, VFBGA56 - 7.7x9mm, 8x7 ball array, 0.75mm pitch,
Package Mechanical Data.
Data reserved at addresses 35h and 38h in Table 33, Device Geometry Definition.
Data corrected at address offset (P+37)h = 70h in Table 39, Bank and Erase Block
Region 2 Information. Quotes removed from Figure 21, Program Flowchart and
Pseudo Code.
GLQV
DDQ
, t
range split into two in Tables 20 and 21, Asynchronous and Synchronous Read
AVLH
, t
LLH
in Table 20 and all the timings in Table 21 were modified.
DDQ
= 1.65V to 2.2V, t
DDQ
Revision Details
= 2.2V to 3.3V, t
M58WR064ET, M58WR064EB
AVKH
and t
AVQV1
ELKH
, t
ELTV
in Table 20, and t
, t
EHTZ
, t
EHQZ
,
LLKH
81/82