AT17F040 ATMEL [ATMEL Corporation], AT17F040 Datasheet
AT17F040
Available stocks
Related parts for AT17F040
AT17F040 Summary of contents
Page 1
... LAP 20-lead PLCC 44-lead PLCC 44-lead TQFP ® ® ™ FLEX , APEX ® , Virtex Table 1-1. The AT17F Series Configurator AT17F040 AT17F080 Yes Yes Yes Yes – Yes – Yes FPGA Devices, ™ FPGAs, Configuration Flash Memory AT17F040 AT17F080 3039I–CNFG–2/05 ...
Page 2
... NC 5 RESET/OE 6 PAGESEL1 20-lead PLCC (Virtex Pinout RESET/ 20-lead PLCC (Virtex pinout) is only available in the AT17F040. 2. Virtex pinout is compatible with the XC17V and XC18V Series PROM SER_EN 16 PAGE_EN 15 READY 14 CEO (A2) (1)(2) 18 SER_EN ...
Page 3
... NC 3039I–CNFG–2/05 44 PLCC TQFP AT17F040/080 READY ...
Page 4
... DATA output pin is tri-stated, regardless of the state of CE. When the configurator has driven out all of its data and CEO is driven Low, the device tri-states the DATA pin to avoid contention with other configurators. Upon power-up, the address counter is automatically reset. AT17F040/080 4 Clock/Oscillator Reset ...
Page 5
... This pin has an internal 20 K pull-up resistor. 2. This pin has an internal 30 K pull-down resistor. AT17F040/080 AT17F080 LAP PLCC PLCC – – – ...
Page 6
... CE until OE goes Low; thereafter, CEO will stay High until the entire EEPROM is read again. Notes: AT17F040/080 6 Address Space AT17F040 (4 Mbits) 00000 – 0FFFFh 10000 – 1FFFFh 20000 – 2FFFFh 30000 – 3FFFFh 00000 – 3FFFFh 1. This pin has an internal 20 K pull-up resistor. ...
Page 7
... SER_EN Low enables the 2-Wire Serial Programming Mode. For non-ISP applications, SER_EN should be tied +3.3V (±10%). Notes: 3039I–CNFG–2/05 pull-up on this pin if used This pin has an internal 20 K pull-up resistor. 2. This pin has an internal 30 K pull-down resistor. AT17F040/080 7 ...
Page 8
... The AT17F parts are read/write at 3.3V nominal. Refe AT17F Programm ing Specification available Atmel web site (www.atmel.com) for more programming details. AT17F devices are supported by the Atmel ATDH2200 programming system along with many third party programmers. AT17F040/080 8 (except during ISP ...
Page 9
... Exposure to Abso- lute Maximum Rating conditions for extended periods of time may affect device reliability. AT17F Series Configurator Min Max 2.97 3.63 2.97 3.63 AT17F040 AT17F080 Min Max Min 2 ...
Page 10
... AC Characteristics CE RESET/OE CLK T CE DATA 15. AC Characteristics when Cascading RESET/OE CE CLK T DATA LAST BIT T CEO AT17F040/080 10 T SCE CAC CDF T OCK OCE T SCE T HCE T HOE FIRST BIT T OOE T OCE 3039I–CNFG–2/05 ...
Page 11
... Industrial 15 Commercial 15 (1) Industrial 15 Commercial 20 (1) Industrial 25 Commercial 0 (1) Industrial 0 Commercial 20 (1) Industrial 20 Commercial (1) Industrial Commercial (1) Industrial Commercial (1) Industrial Commercial (1) Industrial AT17F040/080 Max Units MHz 10 MHz 33 ...
Page 12
... RESET/OE to CEO Delay OOE F Maximum Input Clock Frequency MAX Notes test lead = 50 pF. 2. Float delays are measured with loads. Transition is measured ± 200 mV from steady-state active levels. AT17F040/080 12 AT17F040 Min Commercial Industrial Commercial Industrial Commercial Industrial Commercial Industrial Commercial ...
Page 13
... Plastic Leaded Chip Carrier (PLCC) 44A Thin Plastic Quad Flat Package (TQFP) 44J Plastic Leaded Chip Carrier (PLCC) Note: 1. Airflow = 0 ft/min. 3039I–CNFG–2/05 AT17F040 [ C/W] JC ( C/W] JC ( C/W] – JC (1) [ C/W] – C/W] – JC (1) [ C/W] – JA AT17F040/080 AT17F080 – – – – ...
Page 14
... Plastic J-leaded Chip Carrier (PLCC) 44A 44-lead, Thin (1.0 mm) Plastic Quad Flat Package Carrier (TQFP) 44J 44-lead, Plastic J-leaded Chip Carrier (PLCC) AT17F040/080 14 Ordering Code AT17F040-30CC AT17F040-30JC AT17F040-30VJC AT17F040-30CI AT17F040-30JI AT17F040-30VJI AT17F040-30CU AT17F040-30JU AT17F080-30CC AT17F080-30JC AT17F080-30TQC AT17F080-30BJC AT17F080-30CI AT17F080-30JI AT17F080-30TQI AT17F080-30BJI AT17F080-30CU AT17F080-30JU ...
Page 15
... Orchard Parkway San Jose, CA 95131 R 3039I–CNFG–2/05 D Top View Side View Pin1 Corner TITLE 8CN4, 8-lead ( 1.04 mm Body), Lead Pitch 1.27 mm, Leadless Array Package (LAP) AT17F040/080 A A1 COMMON DIMENSIONS (Unit of Measure = mm) SYMBOL MIN NOM MAX A 0.94 1.04 1.14 A1 0.30 0.34 0.38 b ...
Page 16
... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT17F040/080 16 PIN NO. 1 1.14(0.045) X 45˚ IDENTIFIER e E1 ...
Page 17
... Orchard Parkway San Jose, CA 95131 R 3039I–CNFG–2/05 B PIN 1 IDENTIFIER TITLE 44A, 44-lead Body Size, 1.0 mm Body Thickness, 0.8 mm Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) AT17F040/080 A2 A COMMON DIMENSIONS (Unit of Measure = mm) MIN SYMBOL NOM A – – A1 0.05 – ...
Page 18
... Allowable protrusion is .010"(0.254 mm) per side. Dimension D1 and E1 include mold mismatch and are measured at the extreme material condition at the upper or lower parting line. 3. Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT17F040/080 18 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER E1 E ...
Page 19
Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 ...