X3100V28Z INTERSIL [Intersil Corporation], X3100V28Z Datasheet - Page 16

• Manufacturer Part Number: X3100V28Z
• Description: 3 or 4 Cell Li-ion Battery Protection and Monitor IC
• Manufacturer: INTERSIL [Intersil Corporation]

Over-discharge Protection
If V
said to be in a over-discharge state (Figure 4). In this
instance, the X3100 and X3101 automatically switch
the discharge FET OFF (UVP/OCP = Vcc), and then
enter sleep mode.
The over-discharge (under-voltage) value, V
selected from the values shown in Table 5 by setting
bits VUV1, VUV0 in the configuration register. These
bits are set using the WCFIG command. Once in the
sleep mode, the following steps must occur before the
X3100 or X3101 allows the battery cells to discharge:
– The X3100 and X3101 must wake from sleep mode
– The charge FET must be switched ON by the micro-
– All battery cells must satisfy the condition: V
– The discharge FET must be switched ON by the
The times T
connected between pin UVT and GND (Table 13). The
delay T
can be approximated by the following linear equation:
Table 21. Typical Over-discharge Delay Times
Sleep Mode
The X3100 or X3101 can enter sleep mode in two
ways:
i) The device enters the over-discharge protection
ii) The user sends the device into sleep mode using the
Symbol
(see section “Voltage Regulator” on page 22).
controller (OVP/LMON=V
(see section “Control Register Functionality” on
page 11).
V
microcontroller (UVP/OCP=V
ister (see section “Control Register Functionality” on
page 11)
T
T
mode.
control register.
CELL
UVR
UVR
UV
UV
for a time exceeding T
< V
that results from a particular capacitance C
Over-discharge
detection delay
Over-discharge
release time
UV
UV
T
/T
, for a time exceeding T
Description
UVR
T
UVR
UV
(ms) ≈ 70 x C
(s) ≈ 10 x C
are varied using a capacitor (C
16
SS
), via the control register
UVR
SS
UV
), via the control reg-
UV
0.1µF
0.1µF
.
C
(µF)
(µF)
UV
UV
, the cells are
1.0s (Typ)
7ms (Typ)
UV
Delay
CELL
, can be
X3100, X3101
>
UV
UV
)
,
A sleep mode can be induced by the user, by setting
the SLP bit in the control register (Table 13) using the
WCNTR Instruction.
In sleep mode, power to all internal circuitry is
switched off, minimizing the current drawn by the
device to 1µA (max). In this state, the discharge FET
and
(OVP/LMON=V
regulated output (V
and OVP/LMON via bits UVPC and OVPC in the con-
trol register is also prohibited.
The device returns from sleep mode when V
(e.g. when the battery terminals are connected to a
battery charger). In this case, the X3100 or the X3101
restores the 5VDC regulated output (section “Voltage
Regulator” on page 22), and communication via the
SPI port resumes.
If the Cell Charge Enable function is enabled when
V
verifies that the individual battery cell voltages (V
are larger than the
before allowing the FETs to be turned on.
of V
set bits VCE1–VCE0 in the configuration register.
Only if the condition “
the state of
via the control register
any battery cell then both the Charge FET and the dis-
charge
UVP/OCP=V
the battery cells via terminals P+ / P- is prohibited
The cell charging threshold function can be switched
ON or OFF by the user, by setting bit SWCEN in the
configuration register (Table 7) using the WCFIG com-
mand. In the case that this cell charge enable function
is switched OFF, then V
Neither the X3100 nor the X3101 enter sleep mode
(automatically or manually, by setting the SLP bit) if
V
go into a sleep mode while the battery cells are at a
high voltage (e.g. during cell charging).
CC
CC
1. In this case, charging of the battery may resume ONLY if the
CE
rises above V
≥ V
the
cell charge enable function is switched OFF by setting bit
SWCEN = 1 in the configuration register (See Above,
“CONFIGURATION
page 9).
is selected by using the WCFIG command to
SLR
FET
. This is to ensure that the device does not
CC
charge and discharge FETs be changed
charge
CC
). Thus both charge and discharge of
are
SLR
and UVP/OCP=V
cell charge enable voltage (V
RGO
, the X3100 and X3101 internally
.
OFF
REGISTER
V
FET
CE
) is 0V. Control of UVP/OCP
Otherwise, if V
CELL
is effectively set to 0V.
> V
(OVP/LMON=Vcc
are
FUNCTIONALITY”
CE
CC
” is satisfied can
switched
), and the 5VDC
CELL
CC
January 3, 2008
The value
< V
≥ V
FN8110.1
CE
on
CELL
1
OFF
.
SLR
and
CE
for
)
)
.