NCP5425_06 ONSEMI [ON Semiconductor], NCP5425_06 Datasheet - Page 13

• Manufacturer Part Number: NCP5425_06
• Description: Dual Synchronous Buck Controller
• Manufacturer: ONSEMI [ON Semiconductor]

General
of the following:
consider all of the above effects and provide an output
voltage that will meet the specified tolerance at the load. The
designer must also ensure that the regulator component
temperatures are kept within the manufacturer’s specified
ratings at full load and maximum ambient temperature.
Selecting Feedback Divider Resistors
resistor dividers to set the output voltages. The error
amplifier is referenced to 0.8 V and the output voltage is
determined by selecting resistor divider values. Resistor R1
is selected based on a design trade−off between efficiency
and output voltage accuracy. The output voltage error
resulting from the bias current of the error amplifier can be
estimated, neglecting resistor tolerance, from the following
equation:
Example:
Assume the desired V
due to input bias current is 0.2%.
The output voltage tolerance can be affected by any or all
Budgeting the tolerance is left to the designer who must
The feedback pins (VFB1(2)) are connected to external
After R1 has been chosen, R2 can be calculated from:
R2 + 1.6 K ((1.2 0.8) * 1) + 1.6 K 0.5 + 3.2 K
R1 + (0.2)(0.8) (1
1. Buck regulator output voltage set point accuracy.
2. Output voltage change due to discharging or
3. Output voltage change due to the ESR and ESL of
4. Output voltage ripple and noise.
Rearranging, R1 + (%Error)(0.8) (1
charging of the bulk decoupling capacitors during
a load current transient.
the bulk and high frequency decoupling capacitors,
circuit traces, and vias.
Figure 9. Feedback Divider Resistors
R2 + (R1) ((V OUT 0.8 V) * 1)
%Error + (100)(1
DESIGN GUIDELINES
V
OUT
OUT
R1
R2
10 −4 ) + 1.6 K
= 1.2 V, and the tolerable error
V
FB
10 −6 )(R1) 0.8
10 −4 )
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NCP5425
13
Calculating Duty Cycle
losses) is given by the formula:
where:
Switching Frequency Select and Set
component size and power losses. Operation at higher
switching frequencies allows the use of smaller inductor and
capacitor values. Nevertheless, it is common to select lower
frequency operation because a higher frequency also
diminishes efficiency due to MOSFET gate charge losses.
Additionally, low value inductors at higher frequencies
result in higher ripple current, higher output voltage ripple,
and lower efficiency at light load currents. The value of the
oscillator resistor is designed to be linearly related to the
switching period. If the designer prefers not to use Figure 10
to select the appropriate resistance, the following equation
is a suitable alternative:
where:
The duty cycle of a buck converter (including parasitic
Selecting the switching frequency is a trade−off between
V
V
V
V
V
R
f
SW
800
700
600
500
400
300
200
100
Duty Cycle + D +
OSC
OUT
HFET
L
IN
LFET
0
= output inductor voltage drop due to inductor wire
10
= buck regulator input voltage;
= switching frequency in kHz.
DC resistance;
= oscillator resistor in kW;
= buck regulator output voltage;
= low side FET voltage drop due to RDS(ON).
= high side FET voltage drop due to RDS(ON);
Figure 10. Switching Frequency vs. R
20
R OSC +
30
V IN ) V LFET + V HFET + V L
R
V OUT ) (V HFET ) V L )
21700 * f SW
OSC
2.31 f SW
40
(kW)
50
60
OSC
70