NX2139ACMTR MICROSEMI [Microsemi Corporation], NX2139ACMTR Datasheet
NX2139ACMTR
Related parts for NX2139ACMTR
NX2139ACMTR Summary of contents
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... Boost schottky diode and adaptive dead band control. PGOOD 100k LDOPG Device NX2139ACMTR -10 Rev. 2.3 03/19/09 n Internal Boost Schottky Diode n Ultrasonic mode operation available n Bus voltage operation from 4.5V to 24V n Less than 1uA shutdown current with Enable low ...
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ABSOLUTE MAXIMUM RATINGS VCC,PVCC to GND & BST to SW voltage ............ -0.3V to 6.5V TON to GND ......................................................... -0.3V to 28V HDRV to SW Voltage .......................................... -0. GND ......................................................... -2V to 30V All other pins ...
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PARAMETER VCC UVLO Under-voltage Lockout V threshold Falling VCC threshold ON and OFF time TON operating current ON -time Minimum off time FB voltage Internal FB voltage Input bias current Line regulation OUTPUT voltage Output range VOUT shut down discharge ...
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PARAMETER ENSW/MODE threshold and bias current PFM/Non Synchronous Mode Ultrasonic Mode Synchronous Mode Shutdown mode Input bias current LDO Controller Quiescent current LDOEN logic high voltage LDOEN logic low voltage LDOFB reference voltage Output UVLO threshold Open loop gain LDOFB ...
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PIN DESCRIPTIONS PIN NUMBER PIN SYMBOL This pin is directly connected to the output of the switching regulator and 1 VOUT senses the VOUT voltage. An internal MOSFET discharges the output during turn off. This pin supplies the internal 5V ...
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BLOCK DIAGRAM VCC(2) Bias TON(16) VIN ON time pulse genearation VOUT VOUT FB(3) OCP_COMP VREF=0.75V start soft start VCC 1M ENSW /MODE(15) MODE 1M SELECTION OVP GND(17 PAD) PGOOD(4) LDOFBUVLO_latch LDOPG(5) LDO_POR LDOFBUVLO_latch ENLDO(14) LDO_EN Figure 2 - Simplified block ...
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TYPICAL APPLICATION (VIN=7V to 22V, SW VOUT=1.8V/7A, LDO VOUT=1.5V/2A) PGOOD LDOPG Figure 3 - Demo board schematic Rev. 2.3 03/19/09 4 PGOOD 16 TON 100k 9 PVCC 12 HDRV 2 R13 VCC ...
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Bill of Materials Item Quantity Reference 1 2 CI1 2 2 CO2 3 1 CO1 4 3 C1,C2, C3, ...
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Demoboard Waveforms Fig.4 Startup (CH1 1.8V OUTPUT, CH2 1.5V LDO, CH3 SW PGOOD, CH4 LDO PGOOD) Fig.6 LDO output transient with SW in PFM mode (CH1 1.8V OUTPUT AC, CH2 1.5V LDO AC, CH4 LDO OUTPUT CURRENT) Fig.8 Start into ...
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Rev. 2.3 03/19/09 VIN=12V, VOUT=1.8V 100 1000 OUTPUT CURRENT(mA) Fig. 10 Output efficiency NX2139A 10000 10 ...
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APPLICATION INFORMATION Symbol Used In Application Information Input voltage Output voltage OUT I - Output current OUT DV - Output voltage ripple RIPPLE F - Working frequency Inductor current ripple RIPPLE Design ...
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For this example, one POSCAP 2R5TPE330MC is chosen as output capacitor, the ESR and inductor current typically determines the output voltage ripple. When VIN reach maximum voltage, the output volt- age ripple is ...
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Based On Stability Requirement ESR of the output capacitor can not be chosen too low which will cause system unstable. The zero caused by output capacitor's ESR must satisfy the re- quirement as below ESR 2 ESR ...
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The divider consists of two ratioed resistors so that the output voltage applied at the Fb pin is 0.75V when the output voltage is at the desired value. The following equation applies to figure 11, which V shows ...
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Power Good Output Power good output is open drain output, a pull up resistor is needed. Typically when softstart is finised and FB pin voltage is over 90 PGOOD pin is pulled to high after a 1.6ms delay. ...
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Here C is chosen to be 33pF. For electrolytic or C POSCAP typically selected to be zero determined by the desired output voltage REF LDOOUT REF ...
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Source of the lower MOSFET needs to be con- nected to the GND plane with multiple vias. One is not enough. This is very important. The same applies to the output capacitors and input capacitors. 6. Hdrv and Ldrv ...
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Demoboard Schematic BUS BUS 1 R11 100k R8 100k C16 1u R6 VCC VCC 10 LDOIN LDOIN LDODRV M3 4 SI4800 R18 LDOOUT 50 LDOOUT C19 C7 C3 33n 10u 10u R19 7.5k R20 7.5k Figure 14 ...
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Demoboard Layout Rev. 2.3 03/19/09 Figure 15 Top layer Figure 16 Ground layer NX2139A 19 ...
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Rev. 2.3 03/19/09 Figure 17 Power layer Figure 18 Bottom layer NX2139A 20 ...
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MLPQ 16 PIN PACKAGE OUTLINE DIMENSIONS SYMBOL Dimensions In Millimeters NAME Rev. 2.3 03/19/09 MIN MAX 0.700 0.800 0.000 0.050 0.203REF 0.180 0.300 2.950 3.050 1.600 ...