CS5231-3GDF8 ONSEMI [ON Semiconductor], CS5231-3GDF8 Datasheet - Page 8

• Manufacturer Part Number: CS5231-3GDF8
• Description: 500 mA, 3.3 V Linear Regulator with Auxiliary Control
• Manufacturer: ONSEMI [ON Semiconductor]

for output capacitances greater than 10 mF with equivalent
series resistance less than 1.0 W. While careful board layout
is important, the user should have a stable system if these
constraints are met. A graph showing the region of stability
for the CS5231−3 is included in the “Typical Performance
Characteristics” section of this datasheet.
transient response. During a load transient, the input
capacitor serves as a charge “reservoir,” providing the
needed extra current until the external power supply can
respond. One of the consequences of providing this current
is an instantaneous voltage drop at V
ESR. The magnitude of the voltage change is again the
product of the current change and the capacitor ESR.
that can exist in the system. If the change in current is large
enough, it is possible that the instantaneous voltage drop on
V
enter a mode of operation resembling an oscillation. As the
part turns on, the output current I
current limit during initial charging. Increasing I
in a drop at V
The part will turn off, and the load current will decrease. As
I
starting the cycle all over again. This oscillatory operation
is most likely at initial start−up when the output capacitance
is not charged, and in cases where the ramp−up of the V
supply is slow. It may also occur during the power transition
when the regulator turns on and the PFET turns off. A 15 ms
delay exists between turn−on of the regulator and the
AuxDrv pin pulling the gate of the PFET high. This delay
prevents “chatter” during the power transitions. During this
interval, the linear regulator will attempt to regulate the
output voltage as 3.3 V. If the output voltage is significantly
below 3.3 V, the IC will go into current limit while trying to
raise V
here to alert the user that the condition can exist. It is
typically not a problem in applications. Careful choice of the
PFET switch with respect to R
voltage drop which the output must charge through to return
to a regulated state. More information is provided in the
section on choosing the PFET switch.
the bulk charge storage and reduce the ESR should give
better performance than using a single input capacitor.
Short, straight connections between the power supply and
V
plane will reduce parasitic inductance effects. Wide V
V
INPUT CAPACITORS AND THE V
OUT
IN
IN
OUT
The CS5231−3 has been carefully designed to be stable
A capacitor placed on the V
It is very important to consider the maximum current step
If required, using a few capacitors in parallel to increase
will exceed the V
lead along with careful layout of the PC board ground
decreases, V
traces will reduce resistive voltage drops.
OUT
. It is a short−lived phenomenon and is mentioned
IN
such that the shutdown threshold is reached.
IN
IN
will rise and the part will turn on,
threshold hysteresis, and the IC will
IN
OUT
DS(ON)
pin will help to improve
will increase, reaching
IN
IN
will minimize the
THRESHOLDS
due to capacitor
OUT
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results
IN
and
IN
8
main considerations. First, the PFET should have a very low
turn−on threshold. Choosing a switch transistor with
V
with only 3.3 V of gate drive voltage. Second, the switch
transistor should be chosen to have a low R
minimize the voltage drop due to current flow in the switch.
The formula for calculating the maximum allowable
on−resistance is
where V
supply voltage, V
output voltage, I
and 1.5 is a “fudge factor” to account for increases in
R
the CS5231−3 since the feedback path to the error amplifier
is not externally available. It is important to minimize
voltage drops due to metal resistance of high current PC
board traces. Such voltage drops can occur in both the
supply traces and the return traces.
minimize output voltage errors:
• Always place the linear regulator as close to both load
• Always use the widest possible traces to connect the
• Connect the load to ground through the widest possible
• Connect the IC ground to the load ground trace at the
Output current is limited to a typical value of 850 mA, even
under output short circuit conditions. If the load current
drain exceeds the current limit value, the output voltage will
be pulled down and will result in an out of regulation
condition. The IC does not contain circuitry to report this
fault.
circuitry. The output is disabled if junction temperature of
the IC reaches 180°C. Thermal hysteresis is typically 25°C
and allows the IC to recover from a thermal fault without the
DS(ON)
GS(ON)
The choice of the external PFET switch is based on two
It is not possible to remotely sense the output voltage of
The following board layout practices will help to
The CS5231−3 has internal current limit protection.
The CS5231−3 has internal temperature monitoring
and output capacitors as possible.
linear regulator to the capacitor network and to the
load.
traces.
point where it connects to the load.
R DS(ON)MAX +
AUX(MIN)
≈ 1.0 V will ensure the PFET will be fully enhanced
due to temperature.
CHOOSING THE PFET SWITCH
OUTPUT VOLTAGE SENSING
THERMAL SHUTDOWN
OUT(MAX)
is the minimum value of the auxiliary
OUT(MIN)
CURRENT LIMIT
V AUX(MIN) * V OUT(MIN)
is the maximum output current
1.5
is the minimum allowable
I OUT(MAX)
DS(ON)
to