ATMEGA325V ATMEL [ATMEL Corporation], ATMEGA325V Datasheet
ATMEGA325V
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ATMEGA325V Summary of contents
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... Five Sleep Modes: Idle, ADC Noise Reduction, Power-save, Power-down, and Standby • I/O and Packages – 53/68 Programmable I/O Lines – 64-lead TQFP, 64-pad QFN/MLF, and 100-lead TQFP • Speed Grade: – ATmega325V/ATmega3250V/ATmega645V/ATmega6450V MHz @ 1.8 - 5.5V MHz @ 2.7 - 5.5V – ATmega325/3250/645/6450 MHz @ 2.7 - 5.5V MHz @ 4.5 - 5.5V • Temperature range: – -40°C to 85°C Industrial ® ...
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Features (Continued) • Ultra-Low Power Consumption – Active Mode: 1 MHz, 1.8V: 350 µA 32 kHz, 1.8V: 20 µA (including Oscillator) – Power-down Mode: 100 nA at 1.8V Pin Configurations 2570JS–AVR–11/06 Figure 1. Pinout ATmega3250/6450 1 DNC (RXD/PCINT0) PE0 2 ...
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Disclaimer ATmega325/3250/645/6450 3 Figure 2. Pinout ATmega325/645 DNC 1 (RXD/PCINT0) PE0 2 INDEX CORNER (TXD/PCINT1) PE1 3 (XCK/AIN0/PCINT2) PE2 4 (AIN1/PCINT3) PE3 5 (USCK/SCL/PCINT4) PE4 6 (DI/SDA/PCINT5) PE5 7 (DO/PCINT6) PE6 8 (CLKO/PCINT7) PE7 9 (SS/PCINT8) PB0 10 (SCK/PCINT9) PB1 ...
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Overview The ATmega325/3250/645/6450 is a low-power CMOS 8-bit microcontroller based on the AVR enhanced RISC architec- ture. By executing powerful instructions in a single clock cycle, the ATmega325/3250/645/6450 achieves throughputs approaching 1 MIPS per MHz allowing the system designer to ...
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ATmega325/3250/645/6450 5 The AVR core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly connected to the Arithmetic Logic Unit (ALU), allowing two independent registers to be accessed in one single instruction ...
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Comparison between ATmega325, ATmega3250, ATmega645 and ATmega6450 Pin Descriptions V CC GND Port A (PA7..PA0) Port B (PB7..PB0) Port C (PC7..PC0) Port D (PD7..PD0) Port E (PE7..PE0) 2570JS–AVR–11/06 The ATmega325, ATmega3250, ATmega645, and ATmega6450 differs only in memory sizes, pin ...
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Port F (PF7..PF0) Port G (PG5..PG0) Port H (PH7..PH0) Port J (PJ6..PJ0) RESET XTAL1 XTAL2 AVCC ATmega325/3250/645/6450 7 current if the pull-up resistors are activated. The Port E pins are tri-stated when a reset condition becomes active, even if the ...
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... AREF Resources 2570JS–AVR–11/06 This is the analog reference pin for the A/D Converter. A comprehensive set of development tools, application notes and datasheets are avail- able for download on http://www.atmel.com/avr. ATmega325/3250/645/6450 8 ...
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Register Summary Address Name Bit 7 Reserved - (0xFF) Reserved - (0xFE) Reserved - (0xFD) Reserved - (0xFC) Reserved - (0xFB) Reserved - (0xFA) Reserved - (0xF9) Reserved - (0xF8) Reserved - (0xF7) Reserved - (0xF6) Reserved - (0xF5) Reserved ...
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Address Name Bit 7 UCSR0C - (0xC2) UCSR0B RXCIE0 (0xC1) UCSR0A RXC0 (0xC0) Reserved - (0xBF) Reserved - (0xBE) Reserved - (0xBD) Reserved - (0xBC) Reserved - (0xBB) USIDR (0xBA) USISR USISIF (0xB9) USICR USISIE (0xB8) Reserved - (0xB7) ASSR ...
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Address Name Bit 7 Reserved - (0x83) TCCR1C FOC1A (0x82) TCCR1B ICNC1 (0x81) TCCR1A COM1A1 (0x80) DIDR1 - (0x7F) DIDR0 ADC7D (0x7E) Reserved - (0x7D) ADMUX REFS1 (0x7C) ADCSRB - (0x7B) ADCSRA ADEN (0x7A) ADCH (0x79) ADCL (0x78) Reserved - ...
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Address Name Bit 7 TCCR0A FOC0A 0x24 (0x44) GTCCR TSM 0x23 (0x43) EEARH - 0x22 (0x42) EEARL 0x21 (0x41) EEDR 0x20 (0x40) EECR - 0x1F (0x3F) GPIOR0 0x1E (0x3E) EIMSK PCIE3 0x1D (0x3D) EIFR PCIF3 0x1C (0x3C) Reserved - 0x1B ...
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Instruction Set Summary Mnemonics Operands ARITHMETIC AND LOGIC INSTRUCTIONS ADD Rd, Rr Add two Registers ADC Rd, Rr Add with Carry two Registers ADIW Rdl,K Add Immediate to Word SUB Rd, Rr Subtract two Registers SUBI Rd, K Subtract Constant ...
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Mnemonics Operands BRIE k Branch if Interrupt Enabled BRID k Branch if Interrupt Disabled BIT AND BIT-TEST INSTRUCTIONS SBI P,b Set Bit in I/O Register CBI P,b Clear Bit in I/O Register LSL Rd Logical Shift Left LSR Rd Logical ...
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Mnemonics Operands POP Rd Pop Register from Stack MCU CONTROL INSTRUCTIONS NOP No Operation SLEEP Sleep WDR Watchdog Reset BREAK Break ATmega325/3250/645/6450 15 Description Rd ← STACK (see specific descr. for Sleep function) (see specific descr. for WDR/timer) For On-chip ...
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... Lead Pitch, Thin Profile Plastic Quad Flat Package (TQFP) 2570JS–AVR–11/06 ATmega325/3250/645/6450 Ordering Code Package Type ATmega325V-8AI 64A (2) ATmega325V-8AU 64A ATmega325V-8MI 64M1 (2) ATmega325V-8MU 64M1 ATmega325-16AI 64A (2) ATmega325-16AU 64A ATmega325-16MI 64M1 (2) ATmega325-16MU 64M1 Package Type (1) Operational Range Industrial 0° ...
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ATmega3250 (3) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. ...
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ATmega645 (3) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. ...
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ATmega6450 (3) Speed (MHz) Power Supply 8 1.8 - 5.5V 16 2.7 - 5.5V Notes: 1. This device can also be supplied in wafer form. Please contact your local Atmel sales office for detailed ordering information and minimum quantities. 2. ...
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Packaging Information 64A PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AEB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and ...
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Marked Pin TOP VIEW BOTTOM VIEW Note: 1. JEDEC Standard MO-220, (SAW Singulation) Fig. 1, VMMD. 2. Dimension and tolerance conform to ASMEY14.5M-1994. 2325 Orchard Parkway San Jose, CA 95131 R ...
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PIN 0˚~7˚ L Notes: 1. This package conforms to JEDEC reference MS-026, Variation AED. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are ...
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Errata ATmega325 Rev. C ATmega325 Rev. B ATmega325 Rev. A ATmega3250 Rev. C ATmega3250 Rev. B ATmega325/3250/645/6450 23 • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the ...
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ATmega3250 Rev. A ATmega645 Rev. A ATmega6450 Rev. A 2570JS–AVR–11/06 • Interrupts may be lost when writing the timer registers in the asynchronous timer 1. Interrupts may be lost when writing the timer registers in the asynchronous timer If one ...
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Datasheet Revision History Rev. 2570J – 11/06 Rev. 2570I – 07/06 Rev. 2570H – 06/06 Rev. 2570G – 04/06 Rev. 2570F – 03/06 Rev. 2570E – 03/06 ATmega325/3250/645/6450 25 Please note that the referring page numbers in this section are ...
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Rev. 2570D – 05/05 Rev. 2570C – 11/04 Rev. 2570B – 09/04 Rev. 2570A – 09/04 2570JS–AVR–11/06 1. MLF-package alternative changed to “Quad Flat No-Lead/Micro Lead Frame Package QFN/MLF”. 2. Added “Pin Change Interrupt Timing” on page 53. 3. Updated ...
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Atmel Corporation 2325 Orchard Parkway San Jose, CA 95131, USA Tel: 1(408) 441-0311 Fax: 1(408) 487-2600 Regional Headquarters Europe Atmel Sarl Route des Arsenaux 41 Case Postale 80 CH-1705 Fribourg Switzerland Tel: (41) 26-426-5555 Fax: (41) 26-426-5500 Asia Room 1219 ...