X5083SI INTERSIL [Intersil Corporation], X5083SI Datasheet - Page 12
X5083SI
Manufacturer Part Number
X5083SI
Description
CPU Supervisor with 9Kbit SPI EEPROM
Manufacturer
INTERSIL [Intersil Corporation]
Datasheet
1.X5083SI.pdf
(20 pages)
- Current page: 12 of 20
- Download datasheet (348Kb)
Symbol Table
WAVEFORM
INPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
SCK
CS
SI
12
Non-volatile
Operation
OUTPUTS
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
Write
FIGURE 11. END OF NONVOLATILE WRITE (NO POLLING)
t
WC
Wait t
if not using polling procedure
X5083
WC
after a write for new operation,
0
1
INSTRUCTION
2
NEXT
3
4
5
6
7
September 16, 2005
FN8127.2
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