X5083V8IZ-2.7A INTERSIL [Intersil Corporation], X5083V8IZ-2.7A Datasheet - Page 5

• Manufacturer Part Number: X5083V8IZ-2.7A
• Description: CPU Supervisor with 8Kbit SPI EEPROM
• Manufacturer: INTERSIL [Intersil Corporation]

Principles of Operation
Power-on Reset
Application of power to the X5083 activates a power-on
reset circuit. This circuit goes LOW at 1V and pulls the
RESET pin active. This signal prevents the system
microprocessor from starting to operate with insufficient
voltage or prior to stabilization of the oscillator. RESET
active also blocks communication to the device through the
SPI interface. When V
200ms (nominal) the circuit releases RESET, allowing the
processor to begin executing code. While V
communications to the device are inhibited.
Low Voltage Monitoring
During operation, the X5083 monitors the V
asserts RESET if supply voltage falls below a preset
minimum V
microprocessor from operating in a power fail or brownout
condition and terminates any SPI communication in
progress. The RESET signal remains active until the voltage
drops below 1V. It also remains active until V
exceeds V
When V
progress are terminated and communications are inhibited
until V
Watchdog Timer
The watchdog timer circuit monitors the microprocessor activity
by monitoring the WDI input. The microprocessor must toggle
the CS/WDI pin periodically to prevent a RESET signal. The
CS/WDI pin must be toggled from HIGH to LOW prior to the
expiration of the watchdog time out period. The state of two
nonvolatile control bits in the status register determine the
watchdog timer period. The microprocessor can change these
watchdog bits with no action taken by the microprocessor
these bits remain unchanged, even after total power failure.
V
The X5083 is shipped with a standard V
voltage. This value will not change over normal operating
and storage conditions. However, in applications where the
standard V
needed in the V
adjusted. The procedure is described below, and uses the
application of a high voltage control signal.
Setting the V
This procedure is used to set the V
value. For example, if the current V
V
the new setting is to be lower than the current setting, then it
is necessary to reset the trip point before setting the new
value.
TRIP
CC
Threshold Reset Procedure
is 4.6V, this procedure will directly make the change. If
CC
CC
exceeds V
TRIP
TRIP
TRIP
falls below V
. The RESET signal prevents the
for 200ms.
TRIP
is not exactly right, or if higher precision is
TRIP
TRIP
Voltage
value, the X5083 threshold may be
CC
TRIP
for t
exceeds the device V
, any communications in
PURST
5
.
TRIP
TRIP
CC
to a higher voltage
is 4.4V and the new
threshold (V
CC
CC
CC
TRIP
< V
level and
returns and
TRIP
value for
TRIP
)
X5083
To set the new V
threshold voltage to the V
programming voltage V
followed by a write of Data 00h to address 01h. CS going
HIGH on the write operation initiates the V
sequence. Bring WP LOW to complete the operation.
Note: This operation also writes 00h to array address 01h.
Resetting the V
This procedure is used to set the V
level. For example, if the current V
V
V
This procedure must be used to set the voltage to a lower
value.
To reset the new V
threshold voltage to the Vcc pin and tie the WP pin to the
programming voltage V
followed by a write of data 00h to address 03h. CS going
HIGH on the write operation initiates the V
sequence. Bring WP LOW to complete the operation.
Note: This operation also writes 00h to array address 03h.
TRIP
TRIP
must be 4.0V, then the V
is reset, the new V
TRIP
TRIP
TRIP
voltage, apply the desired V
P
Voltage
P
voltage, apply the desired V
. Then send a WREN command,
. Then send a WREN command,
TRIP
CC
pin and tie the WP pin to the
is something less than 1.7V.
TRIP
TRIP
TRIP
must be reset. When
is 4.4V and the new
to a “native” voltage
TRIP
TRIP
programming
programming
TRIP
June 15, 2006
TRIP
FN8127.3