X4285 XICOR [Xicor Inc.], X4285 Datasheet - Page 13

• Manufacturer Part Number: X4285
• Description: CPU Supervisor with 128K EEPROM
• Manufacturer: XICOR [Xicor Inc.]

X4283/85 – Preliminary Information
Figure 15. X4283/85 Addressing
Operational Notes
The device powers-up in the following state:
– The device is in the low power standby state.
– The WEL bit is set to ‘0’. In this state it is not possible
– SDA pin is the input mode.
– RESET/RESET Signal is active for t
Data Protection
The following circuitry has been included to prevent
inadvertent writes:
– The WEL bit must be set to allow write operations.
– The proper clock count and bit sequence is required
– A three step sequence is required before writing into
– The WP pin, when held HIGH, and WPEN bit at logic
REV 1.17 11/27/00
to write to the device.
prior to the stop bit in order to start a nonvolatile write
cycle.
the Control Register to change Watchdog Timer or
Block Lock settings.
HIGH will prevent all writes to the Control Register.
(X1)
D7
A7
1
0
Device Identifier
(X0)
D6
A6
0
0
Word Address Byte 0 for all Options
PURST
(X7)
A13
(Y5)
Word Address Byte 0–128K
D5
A5
1
Data Byte for all Options
Low Order Word Address
Slave Address Byte
.
A12
(X6)
(Y4)
D4
A4
0
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High Order Word Address
(X5)
A11
(Y3)
D3
A3
0
– Communication to the device is inhibited while
– Block Lock bits can protect sections of the memory
SYMBOL TABLE
Device Select
RESET/RESET is active and any in-progress
communication is terminated.
array from write operations.
(X4)
(Y2)
A10
WAVEFORM
A2
S1
D2
(X3)
(Y1)
S0
A9
A1
D1
R/W
INPUTS
Must be
steady
May change
from LOW
to HIGH
May change
from HIGH
to LOW
Don’t Care:
Changes
Allowed
N/A
(X2)
(Y0)
A8
A0
D0
Characteristics subject to change without notice.
OUTPUTS
Will be
steady
Will change
from LOW
to HIGH
Will change
from HIGH
to LOW
Changing:
State Not
Known
Center Line
is High
Impedance
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