SI9169_07 VISHAY [Vishay Siliconix], SI9169_07 Datasheet - Page 6

• Manufacturer Part Number: SI9169_07
• Description: High Frequency 1-A Synchronous Buck/Boost Converter
• Manufacturer: VISHAY [Vishay Siliconix]

Si9169
Vishay Siliconix
FUNCTIONAL BLOCK DIAGRAM
DETAIL OPERATIONAL DESCRIPTION
Start-Up
The UVLO circuit prevents the internal MOSFET switches
and oscillator circuit from turning on, if the voltage on V
is less than 2.5 V. With typical UVLO hysteresis of 0.1 V,
controller is continuously powered on until the V
drops below 2.4 V. This hysteresis prevents the converter
from oscillating during the start-up phase and unintentionally
locking up the system. Once the V
UVLO threshold, and with no other shutdown condition
detected, an internal Power-On-Reset timer is activated
while most circuitry, except the output driver, are turned on.
After the POR timeout of about 1 ms, the internal soft-start
capacitor is allowed to charge. When the soft-start capacitor
voltage reaches 0.5 V, the PWM circuit is enabled.
Thereafter, the constant current charging the soft-start
capacitor will force the output voltage to rise gradually
without overshooting. To prevent negative undershoot, the
synchronous switch is tri-stated until the duty cycle reaches
about 10 %. In tri-state, the high-side P-Channel MOSFET is
www.vishay.com
6
PWM/PSM
COMP
MODE
SYNC
R
V
OSC
REF
V
FB
O
C
OSC
Reference
Threshold
Generator
Oscillator
DD
voltage exceeds the
Ramp
1.0 V
Soft-Start
Timer
DD
voltage
DD
pin
0.5 V
V
DD
Positive
Supply
Modulator
Modulator
UVLO
PWM
PSM
turned off by pulling up the gate voltage to V
low-side N-Channel MOSFET is turned off by pulling down
the gate voltage to PGND potential. Note that the Si9169 will
always soft starts in the PWM mode regardless of the voltage
level on the PWM/PSM pin.
Shutdown
The Si9169 is designed to conserve as much battery life as
possible by decreasing current consumption of IC during
normal operation as well as the shutdown mode. With logic
low level on the SD pin, current consumption of the Si9169 is
decreased to less than 1 µA by shutting off most of the
circuits. The logic high enables the controller and starts up as
described in "Start-Up" section above.
POR
SD
PWM/PSM
PWM
PSM
Select
EN
EN
Generator
Bias
PWM
PSM
GND
Drivers
IN
V
IN
Negative
Return and
Substrate
S
S-72058-Rev. E, 08-Oct-07
Document Number: 70945
OTP
V
PGND
IN/OUT
S
potential. The
P
N
COIL