LTM8031EVPBF LINER [Linear Technology], LTM8031EVPBF Datasheet - Page 7

• Manufacturer Part Number: LTM8031EVPBF
• Description: Ultralow Noise EMC 36V, 1A DC/DC ?Module Regulator
• Manufacturer: LINER [Linear Technology]

PIN FUNCTIONS
SYNC (Pin L6): This is the external clock synchronization
input. Ground this pin for low ripple Burst Mode
at low output loads. Tie to a stable voltage source greater
than 0.7V to disable Burst Mode operation. Do not leave
this pin fl oating. Tie to a clock source for synchroniza-
tion. Clock edges should have rise and fall times faster
than 1μs. See Synchronization section in Applications
Information.
PGOOD (Pin K7): The PGOOD pin is the open-collector
output of an internal comparator. PGOOD remains low until
the ADJ pin is within 10% of the fi nal regulation voltage.
BLOCK DIAGRAM
FIN
V
GND
SHARE
IN
EMI FILTER
RUN/SS
SYNC
CONTROLLER
CURRENT
®
MODE
operation
RT
The PGOOD output is valid when V
RUN/SS is high. If this function is not used, leave this
pin fl oating.
ADJ (Pin J7): The LTM8031 regulates its ADJ pin to 0.79V.
Connect the adjust resistor from this pin to ground. The
value of R
where R
Burst Mode is a registered trademark of Linear Technology Corporation.
PGOOD
R
ADJ
ADJ
=
ADJ
V
OUT
is in kΩ.
196 71
is given by the equation:
4.7μH
– .
.
0 79
22pF
ADJ
249k
10μF
IN
V
BIAS
GND
AUX
is above 3.6V and
OUT
LTM8031
8031 BD
8031fa
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