GS71024 GSI [GSI Technology], GS71024 Datasheet - Page 6

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GS71024

Manufacturer Part Number
GS71024
Description
64K x 24 1.5Mb Asynchronous SRAM
Manufacturer
GSI [GSI Technology]
Datasheet

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AC Characteristics
Read Cycle
* These parameters are sampled and are not 100% tested
Rev: 1.05 11/2004
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
Read cycle time
Address access time
Chip enable access time (CE1, CE2)
MUX control to output valid (V/S)
Output enable to output valid (OE)
Output hold from address change
Output hold from MUX controls change
Chip enable to output in low Z (CE1, CE2)
Output enable to output in low Z (OE)
Chip disable to output in High Z (CE1, CE2)
Output disable to output in High Z (OE)
Parameter
Address
V/S
Data Out
Read Cycle 1: CE = OE = V
Symbol
Previous Data
t
t
t
OHZ
OLZ
t
t
t
t
t
t
t
t
OH1
LZ
HZ
RC
AC
OE
OH
AA
AV
*
*
*
*
t
Min
6/13
OH
t
8
3
3
3
0
OH1
-8
Max
8
8
8
4
4
4
t
AA
t
AV
Min
9
3
3
3
0
t
RC
IL
-9
, WE = V
Max
4.5
4.5
4.5
9
9
9
Min
10
3
3
3
0
IH
-10
Max
10
10
10
Data valid
5
5
5
Min
12
3
3
3
0
-12
Max
12
12
12
6
6
6
© 1999, GSI Technology
Min
15
3
3
3
0
GS71024T/U
-15
Max
15
15
15
7
7
7
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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