AT89C55WD-33AC ATMEL Corporation, AT89C55WD-33AC Datasheet

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AT89C55WD-33AC

Manufacturer Part Number
AT89C55WD-33AC
Description
8-bit Microcontroller with 20K Bytes Flash
Manufacturer
ATMEL Corporation
Datasheet
Features
Description
The AT89C55WD is a low-power, high-performance CMOS 8-bit microcontroller with
20K bytes of Flash programmable read only memory and 256 bytes of RAM. The
device is manufactured using Atmel’s high-density nonvolatile memory technology and
is compatible with the industry standard 80C51 and 80C52 instruction set and pinout.
The on-chip Flash allows the program memory to be user programmed by a conven-
tional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash
on a monolithic chip, the Atmel AT89C55WD is a powerful microcomputer which pro-
vides a highly flexible and cost effective solution to many embedded control
applications.
The AT89C55WD provides the following standard features: 20K bytes of Flash, 256
bytes of RAM, 32 I/O lines, three 16-bit timer/counters, a six-vector, two-level interrupt
architecture, a full-duplex serial port, on-chip oscillator, and clock circuitry. In addition,
the AT89C55WD is designed with static logic for operation down to zero frequency
and supports two software selectable power saving modes. The Idle Mode stops the
CPU while allowing the RAM, timer/counters, serial port, and interrupt system to con-
tinue functioning. The Power-down Mode saves the RAM contents but freezes the
oscillator, disabling all other chip functions until the next external interrupt or hardware
reset.
Compatible with MCS
20K Bytes of Reprogrammable Flash Memory
Endurance: 1000 Write/Erase Cycles
4V to 5.5V Operating Range
Fully Static Operation: 0 Hz to 33 MHz
Three-level Program Memory Lock
256 x 8-bit Internal RAM
32 Programmable I/O Lines
Three 16-bit Timer/Counters
Eight Interrupt Sources
Programmable Serial Channel
Low-power Idle and Power-down Modes
Interrupt Recovery from Power-down Mode
Hardware Watchdog Timer
Dual Data Pointer
Power-off Flag
®
-51 Products
8-bit
Microcontroller
with 20K Bytes
Flash
AT89C55WD
Rev. 1921B–MICRO–09/02
1

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AT89C55WD-33AC Summary of contents

Page 1

... The on-chip Flash allows the program memory to be user programmed by a conven- tional nonvolatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C55WD is a powerful microcomputer which pro- vides a highly flexible and cost effective solution to many embedded control applications ...

Page 2

... Pin Configurations AT89C55WD 2 TQFP P1 P0.4 (AD4) P1 P0.5 (AD5) P1 P0.6 (AD6) RST 4 30 P0.7 (AD7) (RXD) P3 EA/VPP (TXD) P3 ALE/PROG (INT0) P3 PSEN 25 P2.7 (A15) (INT1) P3.3 9 (T0) P3 P2.6 (A14) (T1) P3 P2.5 (A13) PDIP (T2) P1 VCC (T2EX) P1 P0.0 (AD0) P1 P0.1 (AD1) P1 P0.2 (AD2) P1 ...

Page 3

... PORT 0 DRIVERS PORT 0 RAM LATCH ACC TMP2 TMP1 ALU INTERRUPT, SERIAL PORT, AND TIMER BLOCKS PSW REGISTER PORT 1 LATCH WATCH DOG PORT 1 DRIVERS P1.0 - P1.7 AT89C55WD P2.0 - P2.7 PORT 2 DRIVERS PORT 2 QUICK LATCH FLASH PROGRAM STACK ADDRESS POINTER REGISTER BUFFER PC INCREMENTER PROGRAM COUNTER DUAL DPTR ...

Page 4

... As inputs, Port 3 pins that are externally being pulled low will source current (I Port 3 receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89C55WD, as shown in the following table. AT89C55WD 4 ) because of the internal pull-ups ...

Page 5

... Setting the ALE-disable bit has no effect if the microcontroller is in external execution mode. PSEN Program Store Enable is the read strobe to external program memory. When the AT89C55WD is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory. EA/VPP External Access Enable ...

Page 6

... Table 1. AT89C55WD SFR Map and Reset Values 0F8H B 0F0H 00000000 0E8H ACC 0E0H 00000000 0D8H PSW 0D0H 00000000 T2CON T2MOD 0C8H 00000000 XXXXXX00 0C0H IP 0B8H XX000000 P3 0B0H 11111111 IE 0A8H 0X000000 P2 0A0H 11111111 SCON SBUF 98H 00000000 XXXXXXXX P1 90H 11111111 TCON TMOD ...

Page 7

... POF is set to “1” during power up. It can be set and rest under software control and is not affected by reset. 1921B–MICRO–09/02 RCLK TCLK EXEN2 – – WDIDLE DISRTO AT89C55WD Reset Value = 0000 0000B TR2 C/T2 CP/RL2 Reset Value = XXX00XX0B – – DISALE ...

Page 8

... Address = A2H Not Bit Addressable – Bit 7 – Reserved for future expansion DPS Data Pointer Register Select DPS 0 Selects DPTR Registers DP0L, DP0H 1 Selects DPTR Registers DP1L, DP1H AT89C55WD 8 – – – – Reset Value = XXXXXXX0B – – DPS ...

Page 9

... Data Memory The AT89C55WD implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a par- allel address space to the Special Function Registers. That means the upper 128 bytes have the same addresses as the SFR space but are physically separate from SFR space. ...

Page 10

... With WDIDLE bit enabled, the WDT will stop to count in IDLE mode and resumes the count upon exit from IDLE. UART The UART in the AT89C55WD operates the same way as the UART in the AT89C51 and AT89C52. For further information, see the December 1997 Microcontroller Data Book, page 2- 48, section titled, “Serial Interface”. ...

Page 11

... Timer 0 and 1 Timer 0 and Timer 1 in the AT89C55WD operate the same way as Timer 0 and Timer 1 in the AT89C51 and AT89C52. Timer 2 Timer 16-bit Timer/Counter that can operate as either a timer or an event counter. The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer 2 has three operating modes: capture, auto-reload (up or down counting), and baud rate generator ...

Page 12

... RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes 0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer 2 overflows or underflows and can be used as a 17th bit of resolution. In this operating mode, EXF2 does not flag an interrupt. AT89C55WD 12 C/ TH2 ...

Page 13

... When set, this bit allows Timer configured as an up/down counter 1921B–MICRO–09/02 C/ TH2 CONTR OL TR2 C/ RELO AD RCAP2H CONTROL EXEN2 – – – AT89C55WD TL2 OVERFLOW TIMER 2 INTERRUPT RCAP2L TF2 EXF2 Reset Value = XXXX XX00B – T2OE DCEN ...

Page 14

... C/ PIN Figure 8. Timer 2 in Baud Rate Generator Mode NOTE: OSC. FREQ. IS DIVIDED BY 2, NOT 12 ÷ 2 OSC C/ C/ PIN TRANSITION DETECTOR T2EX PIN AT89C55WD 14 (DOWN COUNTING RELOAD VALUE) 0FFH 0FFH OVERFLOW TH2 TL2 CONTROL TR2 RCAP2H RCAP2L (UP COUNTING RELOAD VALUE) TH2 ...

Page 15

... The timer should be turned off (clear TR2) before accessing the Timer 2 or RCAP2 registers. 1921B–MICRO–09/02 Timer 2 Overflow Rate Modes 1 and 3 Baud Rates = ----------------------------------------------------------- - Modes 1 and 3 Oscillator Frequency -------------------------------------- - = ------------------------------------------------------------------------------------- - Baud Rate 32 x [65536-RCAP2H,RCAP2L)] AT89C55WD 16 15 ...

Page 16

... Figure 9. Timer 2 in Clock-Out Mode OSC P1.0 (T2) TRANSITION DETECTOR P1.1 (T2EX) AT89C55WD 16 2 TR2 C/T2 BIT EXF2 EXEN2 TL2 TH2 (8-BITS) (8-BITS) RCAP2L RCAP2H 2 T2OE (T2MOD.1) TIMER 2 INTERRUPT 1921B–MICRO–09/02 ...

Page 17

... RCAP2H and RCAP2L. Interrupts The AT89C55WD has a total of six interrupt vectors: two external interrupts (INT0 and INT1), three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are all shown in Figure 10. ...

Page 18

... ET2 ES ET1 EX1 ET0 EX0 User software should never write 1s to reserved bits, because they may be used in future AT89 products. Figure 10. Interrupt Sources AT89C55WD 18 – EA ET2 ES Position Function IE.7 Disables all interrupts interrupt is acknowledged each interrupt source is individually enabled or disabled by setting or clearing its enable bit ...

Page 19

... Figure 11. Oscillator Connections Note: 1921B–MICRO–09/ C1 ± for Crystals = 40 pF ± for Ceramic Resonators AT89C55WD is restored to CC XTAL2 XTAL1 GND 19 ...

Page 20

... Figure 12. External Clock Drive Configuration Table 8. Status of External Pins During Idle and Power-down Modes Mode Program Memory Idle Internal Idle External Power-down Internal Power-down External AT89C55WD 20 NC XTAL2 EXTERNAL XTAL1 OSCILLATOR SIGNAL GND ALE PSEN PORT0 1 1 Data 1 1 Float 0 0 Data ...

Page 21

... Program The AT89C55WD has three lock bits that can be left unprogrammed (U) or can be pro- grammed (P) to obtain the additional features listed in the following table. Memory Lock Bits Table 9. Lock Bit Protection Modes Program Lock Bits When lock bit 1 is programmed, the logic level at the EA pin is sampled and latched during reset ...

Page 22

... Reading the Signature Bytes: The signature bytes are read by the same procedure as a nor- mal verification of locations 000H, 100H, and 200H, except that P3.6 and P3.7 must be pulled to a logic low. The values returned are as follows: AT89C55WD 22 (000H) = 1EH indicates manufactured by Atmel (100H) = 55H (200H) = 06H indicates 89C55WD 1921B– ...

Page 23

... (2) 12V (2) 12V (3) 12V AT89C55WD P3.4 P2.5-0 P0.7-0 P3.6 P3.7 Data Address A14 A13 A14 A13-8 OUT P0. P0. ...

Page 24

... A14 (P3.4) is not the same as the external memory address line A14 (P2.6). 4.5V to 5.5V AT89C55WD V P1.0 - P1.7 CC PGM P2.0 - P2.5 P0 DATA P3.4 P2.6 P2.7 ALE PROG P3.3 P3.6 P3.7 XTAL2 RDY/ P3.0 BSY XTAL1 RST V IH GND PSEN 4.5V to 5.5V AT89C55WD V P1.0 - P1.7 CC PGM DATA P0 P2.0 - P2.5 (USE 10K P3.4 PULL-UPS) P2.6 P2.7 ALE P3.3 P3 P3.7 XTAL XTAL1 RST IH GND PSEN 1921B–MICRO–09/02 ...

Page 25

... GLGH t Address to Data Valid AVQV t ENABLE Low to Data Valid ELQV t Data Float After ENABLE EHQZ t PROG High to BUSY Low GHBL t Byte Write Cycle Time WC 1921B–MICRO–09/02 PP AT89C55WD Min Max Units 11.5 12 MHz 48t CLCL 48t CLCL 48t CLCL ...

Page 26

... Flash Programming and Verification Waveforms P1.0 - P1.7 P2.0 - P2.5 P3.4 PORT 0 ALE/PROG EA/V PP P2.7 (ENABLE) P3.0 (RDY/BSY) Lock Bit Programming Test Conditions Setup Lockbit_1 Data Setup ALE/PROG V = 6.5V CC AT89C55WD 26 PROGRAMMING ADDRESS DATA DVGL GHDX t t AVGL GHAX t t SHGL GHSL t GLGH V LOGIC 1 PP LOGIC 0 t EHSH t ELQV ...

Page 27

... Parallel Chip Erase Mode Test Conditions Setup 200 ns ALE/PROG P3<0> Erase V = 6.5V CC 1921B–MICRO–09/02 Test Conditions Setup 200 ns DC Erase Erase 10 ms AT89C55WD DC Erase V = 4.5V to 5.5V CC Wait 10 ms before reprogramming 27 ...

Page 28

... V OL than the listed test conditions. 2. Minimum V for Power-down is 2V. CC AT89C55WD 28 *NOTICE: Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent dam- age to the device. This is a stress rating only and functional operation of the device at these or any ...

Page 29

... CLCL 203 4t -75 CLCL 23 t -30 CLCL 433 7t -130 CLCL 33 t -25 CLCL 0 43 123 t -25 CLCL AT89C55WD Max Units 33 MHz -65 ns CLCL -60 ns CLCL ns t -25 ns CLCL ns 5t -80 ns CLCL ...

Page 30

... External Program Memory Read Cycle ALE PSEN PORT 0 PORT 2 External Data Memory Read Cycle ALE PSEN RD PORT FROM RI OR DPL PORT 2 AT89C55WD 30 t LHLL t t AVLL LLIV t LLPL t PLIV t PLAZ t LLAX t PXIX INSTR IN t AVIV A8 - A15 t LHLL t LLDV t RLRH ...

Page 31

... LLAX t t QVWX AVLL t QVWH DATA OUT t AVWL P2 A15 FROM DPH t t CHCX CLCH CC t CLCX Min AT89C55WD t WHLH t WHQX FROM PCL INSTR A15 FROM PCH t CHCX t t CLCL Max Units 33 MHz CHCL ...

Page 32

... IL (1) Float Waveforms V Note: 1. For timing purposes, a port pin is no longer floating when a 100 mV change from load voltage occurs. A port pin begins to float when a 100 mV change from the loaded V AT89C55WD 32 = 4.0V to 5.5V and Load Capacitance = 80 pF MHz Osc Min 1.0 700 ...

Page 33

... Ordering Code 24 4.0V to 5.5V AT89C55WD-24AC AT89C55WD-24JC AT89C55WD-24PC AT89C55WD-24AI AT89C55WD-24JI AT89C55WD-24PI 33 4.5V to 5.5V AT89C55WD-33AC AT89C55WD-33JC AT89C55WD-33PC 44A 44-lead, Thin Plastic Gull Wing Quad Flatpack (TQFP) 44J 44-lead, Plastic J-leaded Chip Carrier (PLCC) 40P6 40-pin, 0.600" Wide, Plastic Dual Inline Package (PDIP) 1921B–MICRO–09/02 Package ...

Page 34

... This package conforms to JEDEC reference MS-026, Variation ACB. 2. Dimensions D1 and E1 do not include mold protrusion. Allowable protrusion is 0.25 mm per side. Dimensions D1 and E1 are maximum plastic body size dimensions including mold mismatch. 3. Lead coplanarity is 0.10 mm maximum. 2325 Orchard Parkway San Jose, CA 95131 R AT89C55WD ...

Page 35

... Lead coplanarity is 0.004" (0.102 mm) maximum. 2325 Orchard Parkway San Jose, CA 95131 R 1921B–MICRO–09/02 1.14(0.045) X 45˚ PIN NO. 1 IDENTIFIER TITLE 44J, 44-lead, Plastic J-leaded Chip Carrier (PLCC) AT89C55WD 0.318(0.0125) 0.191(0.0075) B1 D2/ COMMON DIMENSIONS (Unit of Measure = mm) MIN NOM MAX NOTE ...

Page 36

... C Notes: 1. This package conforms to JEDEC reference MS-011, Variation AC. 2. Dimensions D and E1 do not include mold Flash or Protrusion. Mold Flash or Protrusion shall not exceed 0.25 mm (0.010"). TITLE 2325 Orchard Parkway San Jose, CA 95131 R AT89C55WD 36 D PIN 0º ~ 15º REF eB 40P6, 40-lead (0.600" ...

Page 37

... Atmel Corporation 2002. Atmel Corporation makes no warranty for the use of its products, other than those expressly contained in the Company’s standard warranty which is detailed in Atmel’s Terms and Conditions located on the Company’s web site. The Company assumes no responsibility for any errors which may appear in this document, reserves the right to change devices or specifications detailed herein at any time without notice, and does not make any commitment to update the information contained herein ...

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