ML4826 Fairchild, ML4826 Datasheet

no-image

ML4826

Manufacturer Part Number
ML4826
Description
PFC and Dual Output PWM Controller Combo
Manufacturer
Fairchild
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ML4826CP-1
Manufacturer:
ML
Quantity:
672
Part Number:
ML4826CP-2
Manufacturer:
NXP
Quantity:
101
Part Number:
ML4826CP2
Manufacturer:
RIFA
Quantity:
100
Company:
Part Number:
ML4826CP2
Quantity:
2 106
Part Number:
ML4826CS-2
Manufacturer:
ML
Quantity:
1 831
Part Number:
ML4826CS-2
Manufacturer:
MICROLINEAR
Quantity:
20 000
Part Number:
ML4826IP-1
Manufacturer:
LINEAR
Quantity:
15 158
Features
• Internally synchronized PFC and PWM in one IC
• Low total harmonic distortion
• Low ripple current in the storage capacitor between the
• Average current, continuous boost, leading edge PFC
• High efficiency trailing edge PWM with dual totem-pole
• Average line voltage compensation with brown-out
• PFC overvoltage comparator eliminates output “runaway”
• Current-fed multiplier for improved noise immunity
• Overvoltage protection, UVLO, and soft start
Block Diagram
ML4826
PFC and Dual Output PWM Controller Combo
19
10
2
4
3
8
7
9
6
5
PFC and PWM sections
outputs
control
due to load removal
I AC
V FB
V RMS
I SENSE
RAMP 1
R T C T
RAMP 2
V DC
SS
DC I LIMIT
2.5V
V CC
50µA
8V
+
8V
-
VEA
VEAO
MODULATOR
1.5V
GAIN
20
11
3.5kΩ
AGND
3.5kΩ
+
-
-
+
IEA
IEAO
8V
-
+
OSCILLATOR
1
+
-
POWER FACTOR CORRECTOR
2.5V
V FB
PULSE WIDTH MODULATOR
+
-
V IN OK
DUTY CYCLE
General Description
The ML4826 is a high power controller for power factor
corrected, switched mode power supplies. PFC allows the
use of smaller, lower cost bulk capacitors, reduces power line
loading and stress on the switching FETs, and results in a
power supply that fully complies with IEC1000-3-2 specifi-
cations. The ML4826 includes circuits for the implementa-
tion of a leading edge, average current “boost” type power
factor correction and a trailing edge, pulse width modulator
(PWM) with dual totem-pole outputs.
An over-voltage comparator shuts down the PFC section in
the event of a sudden decrease in load. The PFC section also
includes peak current limiting and input voltage brown-out
protection. The PWM section can be operated in current or
voltage mode at up to 250kHz and includes a duty cycle limit
to prevent transformer saturation.
LIMIT
2.7V
1V
-1V
PFC I LIMIT
+
-
OVP
+
+
-
-
DC I LIMIT
V CCZ
V CCZ
13.5V
www.fairchildsemi.com
UVLO
R
S
S
S
R
S
R
T
Q
Q
Q
Q
Q
Q
Q
Q
REFERENCE
REV. 1.0.5 2/14/02
7.5V
17
PGND
V CC2
V CC
PFC OUT
PWM 2
PWM 1
PGND
V REF
V CC2
18
15
16
14
13
12

Related parts for ML4826

ML4826 Summary of contents

Page 1

... DC I LIMIT 10 General Description The ML4826 is a high power controller for power factor corrected, switched mode power supplies. PFC allows the use of smaller, lower cost bulk capacitors, reduces power line loading and stress on the switching FETs, and results in a power supply that fully complies with IEC1000-3-2 specifi- cations. The ML4826 includes circuits for the implementa- tion of a leading edge, average current “ ...

Page 2

... Positive supply (connected to an internal shunt regulator). CC1 18 V Buffered output for the internal 7.5V reference REF 19 V PFC transconductance voltage error amplifier input FB 20 VEAO PFC transconductance voltage error amplifier output 2 ML4826 20-Pin PDIP (P20) IEAO 1 20 VEAO ...

Page 3

... NON INV INV Note 2 ∆ ±0.5V OUT ∆ ±0.5V 1.5V IN OUT V – 3V < V < V – 0.5V CCZ CC CCZ VEAO = 3.75V NON INV INV ML4826 Max. Units 0.3 V CCZ 500 mA 500 mA 1.5 mJ 150 °C 150 °C 260 ° ...

Page 4

... ML4826 Electrical Characteristics Unless otherwise specified 25mA Operating Temperature Range (Note 1) A Symbol Parameter Output High Voltage Output Low Voltage Source Current Sink Current Open Loop Gain Power Supply Rejection Ratio OVP Comparator Threshold Voltage Hysteresis PFC I Comparator LIMIT Threshold Voltage ∆ ...

Page 5

... Includes all bias currents to other circuits connected to the VFB pin. 3. Gain = K x 5.3V GAINMOD OFFSET REV. 1.0.5 2/14/02 (continued 52.3kΩ RAMP 1 T RAMP1 Conditions 1mA < I(V ) < 20mA REF Line, Load, Temp T = 125˚C, 1000 Hours J ML4826-2, V > 5.7V IEAO V < 1.2V IEAO I = –20mA OUT I = –50mA OUT I = 10mA OUT 20mA OUT I ...

Page 6

... ML4826 Typical Performance Characteristics 250 200 150 100 (V) Voltage Error Amplifier (VEA) Transconductance (g Variable Gain Control Transfer Characteristic 20 IEAO VEAO V FB VEA IEA 3.5kΩ 2. GAIN V RMS MODULATOR 4 3.5kΩ I SENSE 3 RAMP 250 ...

Page 7

... PFC Section Gain Modulator Figure 1 shows a block diagram of the PFC section of the ML4826. The gain modulator is the heart of the PFC this circuit block which controls the response of the current loop to line voltage waveform and frequency, rms line volt- age, and PFC output voltage. There are three inputs to the gain modulator ...

Page 8

... PFC will not restart until the voltage at V set at a level where the active and passive external power components and the ML4826 are within their safe operating voltages, but not so low as to interfere with the boost voltage regulation loop. ...

Page 9

... T there are several points which should be noted. Foremost among these is its inherent synchronization to the PFC section of the device, from which it also derives its basic timing (at twice the PFC frequency in the ML4826-2). The PWM is capable of current-mode or voltage mode operation.   V ...

Page 10

... PWM section at line voltages between 90Vrms and 265Vrms The ML4826 is a current-fed part. It has an internal shunt voltage regulator, which is designed to regulate the voltage internal to the part at 13.5V. This allows a low power dissi- pation while at the same time delivering 10V of gate drive at the PWM OUT and PFC OUT outputs ...

Page 11

... IC. Other methods such as a simple series resistor are possible, but can very easily lead to excessive I CC ML4826. Figures 6 and 7 show other possible methods for feeding Leading/Trailing Modulation ...

Page 12

... ML4826 RECTIFIED 20V 22kΩ MJE200 Q1 PN2222 18Ω ML4826 1µF RTN Figure 5. V Bias Circuitry 39kΩ 1500µF GATE DRIVE PRODUCT SPECIFICATION V BIAS V CC 1µF ML4826 RTN Figure 6. V BIAS V CC ML4826 RTN Figure 7. REV. 1.0.5 2/14/02 ...

Page 13

... Figure 9. Typical Leading Edge Control Scheme. REV. 1.0.5 2/14/02 SW2 SW1 C1 RAMP VEAO – DFF + VSW1 RAMP R Q – CLK Q CLK SW2 SW1 RAMP C1 VEAO DFF CMP VSW1 + R Q – CLK ML4826 TIME TIME VEAO TIME TIME 13 ...

Page 14

... ML4826 Figure 10. 48V 300W Power Factor Corrected Power Supply 14 PRODUCT SPECIFICATION REV. 1.0.5 2/14/02 ...

Page 15

... PIN 0.060 MIN (1.52 MIN) (4 PLACES) 0.170 MAX (4.32 MAX) 0.125 MIN (3.18 MIN) REV. 1.0.5 2/14/02 inches (millimeters) Package: P20 20-Pin PDIP 1.010 - 1.035 (25.65 - 26.29) 0.240 - 0.260 (6.09 - 6.61) 0.055 - 0.065 0.100 BSC (1.40 - 1.65) (2.54 BSC) 0.015 MIN (0.38 MIN) SEATING PLANE 0.016 - 0.022 (0.40 - 0.56) ML4826 0.295 - 0.325 (7.49 - 8.26) 0.008 - 0.012 0º - 15º (0.20 - 0.31) 15 ...

Page 16

... ML4826 Ordering Information Part Number PWM Frequency ML4826CP2 2 x PFC DISCLAIMER FAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN; ...

Related keywords