ML4827CP-1 Micro Linear, ML4827CP-1 Datasheet - Page 13

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ML4827CP-1

Manufacturer Part Number
ML4827CP-1
Description
Fault-Protected PFC and PWM Controller Combo
Manufacturer
Micro Linear
Datasheet

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Part Number:
ML4827CP-1
Manufacturer:
ML
Quantity:
20 000
FUNCTIONAL DESCRIPTION
The ML4827 should be locally bypassed with a 10nF and
a 1 F ceramic capacitor. In most applications, an
electrolytic capacitor of between 100 F and 330 F is also
required across the part, both for filtering and as part of
the start-up bootstrap circuitry.
LEADING/TRAILING MODULATION
Conventional Pulse Width Modulation (PWM) techniques
employ trailing edge modulation in which the switch will
turn on right after the trailing edge of the system clock.
The error amplifier output voltage is then compared with
the modulating ramp. When the modulating ramp reaches
the level of the error amplifier output voltage, the switch
will be turned OFF. When the switch is ON, the inductor
current will ramp up. The effective duty cycle of the
+
DC
+
DC
VIN
VIN
REF
OSC
REF
OSC
L1
I1
U4
L1
I1
U4
+
+
EA
RAMP
CLK
EA
RAMP
CLK
U3
U3
Figure 6. Typical Leading Edge Control Scheme.
Figure 5. Typical Trailing Edge Control Scheme.
VEAO
SW2
SW2
SW1
SW1
+
+
CMP
U1
(Continued)
U1
I2
I2
I4
I4
I3
C1
I3
C1
D
R
D
R
DFF
CLK
DFF
CLK
U2
U2
RL
RL
Q
Q
Q
Q
trailing edge modulation is determined during the ON
time of the switch. Figure 5 shows a typical trailing edge
control scheme.
In the case of leading edge modulation, the switch is
turned OFF right at the leading edge of the system clock.
When the modulating ramp reaches the level of the error
amplifier output voltage, the switch will be turned ON.
The effective duty-cycle of the leading edge modulation
is determined during the OFF time of the switch. Figure 6
shows a leading edge control scheme.
One of the advantages of this control technique is that it
requires only one system clock. Switch 1 (SW1) turns off
and switch 2 (SW2) turns on at the same instant to
minimize the momentary “no-load” period, thus lowering
ripple voltage generated by the switching action. With
RAMP
VSW1
RAMP
VSW1
VEAO
VEAO
TIME
TIME
TIME
TIME
ML4827
13

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