LM78 National Semiconductor, LM78 Datasheet - Page 8

• Manufacturer Part Number: LM78
• Description: Microprocessor System Hardware Monitor
• Manufacturer: National Semiconductor

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ISA READ TIMING
t
t
t
t
SDRD
SDRD
RD
RS
AC Electrical Characteristics
unless otherwise specified. Boldface limits apply for T
The delay between consecutive IORD and IOWR pulses should be greater than 50 ns to ensure that an Power-on reset does not
occur unintentionally. (SeeSection 3.2‘Resets’ )
(setup)
(delay)
Symbol
(setup)
(hold)
Valid
Data Valid to IORD Inactive
IORD Inactive to Data Invalid
IORD Active to Rising Edge of SYSCLK
Rising Edge of SYSCLK number 1 to Data
Parameter
FIGURE 2. ISA Bus Read Timing Diagram
(Note 13) The following specifications apply for +4.25 V
A
= T
J
8
= T
MIN
With 8.33
MHz
SYSCLK
Conditions
to T
MAX
; all other limits T
(Note 8)
Typical
A
= T
J
(Note 9)
= 25˚C. (Continued)
Limits
DC
120
360
20
5
DS012873-5
V
CC
+5.75 V
ns (max)
(Limits)
ns (min)
ns (min)
ns (min)
Units
DC