TP2435N8 Supertex Inc, TP2435N8 Datasheet

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TP2435N8

Manufacturer Part Number
TP2435N8
Description
P-Channel Enhancement-Mode Vertical DMOS FETs
Manufacturer
Supertex Inc
Datasheet
Ordering Information
*
** Die in wafer form.
Features
Applications
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
Operating and Storage Temperature
Soldering Temperature*
*
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Distance of 1.6 mm from case for 10 seconds.
Same as SOT-89. Product supplied on 2000 piece carrier tape reels.
Low threshold
High input impedance
Low input capacitance
Fast switching speeds
Free from secondary breakdown
Low input and output leakage
Complementary N- and P-channel devices
Logic level interfaces
Solid state relays
Linear Amplifiers
Power Management
Analog switches
Telecom switches
BV
BV
-350V
DSS
DGS
/
R
(max)
DS(ON)
15Ω
V
(max)
-2.4V
GS(th)
P-Channel Enhancement-Mode
Vertical DMOS FETs
-55°C to +150°C
-800mA
(min)
I
D(ON)
BV
BV
300°C
± 20V
DGS
DSS
1
TO-243AA*
TP2435N8
Order Number / Package
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) power
transistors utilize a vertical DMOS structure and Supertex's well-
proven silicon-gate manufacturing process. This combination
produces devices with the power handling capabilities of bipolar
transistors and with the high input impedance and positive
temperature coefficient inherent in MOS devices. Characteristic
of all MOS structures, these devices are free from thermal
runaway and thermally induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Package Option
where ❋ = 2-week alpha date code
Note: See Package Outline section for dimensions.
Product marking for TO-243AA:
TP2435NW
TP4S❋
Die**
G
TO-243AA
(SOT-89)
D
S
Low Threshold
D
TP2435

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TP2435N8 Summary of contents

Page 1

... GS(th) D(ON) (max) (min) TO-243AA* -2.4V -800mA TP2435N8 Product marking for TO-243AA: where ❋ = 2-week alpha date code Low Threshold DMOS Technology These low threshold enhancement-mode (normally-off) power transistors utilize a vertical DMOS structure and Supertex's well- proven silicon-gate manufacturing process. This combination produces devices with the power handling capabilities of bipolar transistors and with the high input impedance and positive temperature coefficient inherent in MOS devices ...

Page 2

Thermal Characteristics Package I (continuous)* D TO-243AA -231mA * I (continuous) is limited by max rated † Mounted on FR5 board, 25mm x 25mm x 1.57mm. Significant P Electrical Characteristics Symbol Parameter BV Drain-to-Source DSS Breakdown ...

Page 3

Typical Performance Curves 3 TP2435 ° ...

Page 4

... Typical Performance Curves ©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited. 1235 Bordeaux Drive, Sunnyvale, CA 94089 TEL: (408) 744-0100 • FAX: (408) 222-4895 4 TP2435 11/12/01 www.supertex.com ...

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