PSD913212JIT ST Microelectronics, PSD913212JIT Datasheet - Page 30

• Manufacturer Part Number: PSD913212JIT
• Description: Flash In-System Programmable ISP Peripherals For 8-bit MCUs
• Manufacturer: ST Microelectronics

The
PSD9XX
Functional
Blocks
(cont.)
26
PSD9XX Family
Flash Protection Register
Secondary Flash Protection Register
Bit Definitions:
Sec<i>_Prot
Sec<i>_Prot
Table 11. Sector Protection/Security Bit Definition
*:
Bit Definitions:
Sec<i>_Prot
Sec<i>_Prot
Security_Bit
9.1.1.9.2 Reset Instruction – PSD913F2
The Reset instruction consists of one write cycle (see Table 9). It can also be optionally
preceded by the standard two write decoding cycles (writing AAh to 555h and 55h to
AAAh).
The Reset instruction must be executed after:
1. Reading the Flash Protection status or Flash ID
2. When an error condition occurs (DQ5 goes high) during a Flash programming or erase
The Reset instruction will reset the Flash to normal Read Mode. It may take the Flash
memory up to few msec to complete the reset cycle.
The Reset instruction is ignored when it is issued during a Flash programming or Bulk
Erase cycle. During Sector Erase cycle, the Reset instruction will abort the on going sector
erase cycle and return the Flash to normal Read Mode in up to few msec.
9.1.1.9.3 Reset Instruction – PSD934F2, PSD954F2
The Reset instruction consists of one write cycle (see Table 9). It can also be optionally
preceded by the standard two write decoding cycles (writing AAh to 555h and 55h to
AAAh).
The Reset instruction must be executed after:
1. Reading the Flash Protection status or Flash ID
2. When an error condition occurs (DQ5 goes high) during a Flash programming or erase
The Reset instruction will immediately reset the Flash to normal Read Mode. However,
if there is an error condition (DQ5 goes high), the Flash memory will return to the Read
Mode in 25 µsec after the Reset instruction is issued.
The Reset instruction is ignored when it is issued during a Flash programming or Bulk
Erase cycle. The Reset instruction will abort the on going sector erase cycle and return the
Flash memory to normal Read Mode in 25 µsec.
Sec7_Prot
Security_
Not used.
cycle.
cycle.
Bit 7
Bit 7
Bit
Sec6_Prot Sec5_Prot Sec4_Prot
Bit 6
Bit 6
1 = Main Flash Sector <i> is write protected.
0 = Main Flash Sector <i> is not write protected.
1 = Secondary Flash Sector <i> is write protected.
0 = Secondary Flash Sector <i> is not write protected.
0 = Security Bit in device has not been set.
1 = Security Bit in device has been set.
*
Bit 5
Bit 5
*
Bit 4
Bit 4
*
Sec3_Prot Sec2_Prot Sec1_Prot Sec0_Prot
Sec3_Prot Sec2_Prot Sec1_Prot Sec0_Prot
Bit 3
Bit 3
Bit 2
Bit 2
Preliminary Information
Bit 1
Bit 1
Bit 0
Bit 0