LP8340CLD-ADJ National Semiconductor, LP8340CLD-ADJ Datasheet
LP8340CLD-ADJ
Manufacturer Part Number
LP8340CLD-ADJ
Description
Manufacturer
National Semiconductor
Datasheets
1.LP8340CLD-ADJ.pdf
(14 pages)
2.LP8340CLD-ADJ.pdf
(14 pages)
3.LP8340CLD-ADJ.pdf
(14 pages)
Specifications of LP8340CLD-ADJ
Case
SOP14
Date_code
06+
© 2005 National Semiconductor Corporation
LP8340
Low Dropout, Low I
General Description
The LP8340 low-dropout CMOS linear regulator is available
in 5V, 3.3V, 2.5V, 1.8V and adjustable output versions. Pack-
aged in the 6ld LLP package and 3ld DPAK. The LP8340 can
deliver up to 1.0A output current.
Typical dropout voltage is 420mV at 1.0A for the 5.0V ver-
sion, 540mV at 1.0A for the 3.3V version, 670mV at 1.0A for
the 2.5V version and 680mV at 800mA for the 1.8V version.
The LP8340 includes a zener trimmed bandgap voltage
reference, foldback current limiting and thermal overload
limiting.
The LP8340 features a PMOS output transistor which unlike
PNP type low dropout regulators requires no base drive
current. This allows the device ground current to remain less
than 50µA over operating temperature, supply voltage and
irrespective of the load current.
Typical Applications
DS200609
Q
, 1.0A CMOS Linear Regulator
Adjustable V
Fixed V
Features
n
n 420mV Typical Dropout
n Wide Operating Range
n Internal 1.0A PMOS Output Transistor
n 19µA Typical Quiescent Current
n Thermal Overload Limiting
n Foldback Current Limiting
n Zener Trimmed Bandgap Reference
n Space saving LLP package
n Temperature Range
Applications
n Hard Disk Drives
n Notebook Computers
n Battery Powered Electronics
n Portable Instrumentation
OUT
±
— LP8340C
— LP8340I
OUT
1.5% Typical V
OUT
tolerance
20060901
20060902
@
1.0A (V
O
= 5V)
−40˚C to 125˚C
www.national.com
0˚C to 125˚C
2.7V to 10V
May 2005
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