MC74VHC1G125DFT2G ON Semiconductor, MC74VHC1G125DFT2G Datasheet

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MC74VHC1G125DFT2G

Manufacturer Part Number
MC74VHC1G125DFT2G
Description
Manufacturer
ON Semiconductor
Datasheet

Specifications of MC74VHC1G125DFT2G

Date_code
05+
Packing_info
SOT-353

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MC74VHC1G125DFT2G
Manufacturer:
ON/安森美
Quantity:
20 000
MC74VHC1G125
Noninverting 3−State Buffer
noninverting 3−state buffer fabricated with silicon gate CMOS
technology. It achieves high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining CMOS low power
dissipation.
3−state output which provides high noise immunity and stable output.
voltages up to 7.0 V are applied, regardless of the supply voltage. This
allows the MC74VHC1G125 to be used to interface 5.0 V circuits to
3.0 V circuits.
Features
September, 2004 − Rev. 12
The MC74VHC1G125 is an advanced high speed CMOS
The internal circuit is composed of three stages, including a buffered
The MC74VHC1G125 input structure provides protection when
These are Pb−Free Devices
High Speed: t
Low Power Dissipation: I
Power Down Protection Provided on Inputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 58; Equivalent Gates = 15
Semiconductor Components Industries, LLC, 2004
GND
IN A
OE
PD
IN A
OE
= 3.5 ns (Typ) at V
Figure 1. Pinout (Top View)
1
2
3
Figure 2. Logic Symbol
EN
CC
= 1 mA (Max) at T
CC
= 5.0 V
5
4
OUT Y
A
V
OUT Y
CC
= 25 C
1
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
A Input
1
2
4
3
5
H
X
L
ORDERING INFORMATION
SC−88A/SOT−353/SC−70
TSOP−5/SOT−23/SC−59
FUNCTION TABLE
http://onsemi.com
PIN ASSIGNMENT
CASE 419A
DF SUFFIX
DT SUFFIX
CASE 483
OE Input
H
L
L
Publication Order Number:
OUT Y
GND
IN A
V
OE
MC74VHC1G125/D
CC
DIAGRAMS
Pin 1
d = Date Code
Pin 1
d = Date Code
Y Output
MARKING
H
Z
L
W0
W0
d
d

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