MT48LC2M32B2TG5 Micron Semiconductor Products, MT48LC2M32B2TG5 Datasheet

MT48LC2M32B2TG5

Manufacturer Part Number

MT48LC2M32B2TG5

Description

TSOP86

Manufacturer

Micron Semiconductor Products

Datasheet

1.MT48LC2M32B2TG5.pdf (53 pages)

Specifications of MT48LC2M32B2TG5

Date_code

06+

Current page: 1 of 53
Download datasheet (2Mb)

SYNCHRONOUS

DRAM

FEATURES

• PC100 functionality

• Fully synchronous; all signals registered on

• Internal pipelined operation; column address can

• Internal banks for hiding row access/precharge

• Programmable burst lengths: 1, 2, 4, 8, or full page

• Auto Precharge, includes CONCURRENT AUTO

• Self Refresh Mode

• 64ms, 4,096-cycle refresh (15.6µs/row)

• LVTTL-compatible inputs and outputs

• Single +3.3V ±0.3V power supply

• Supports CAS latency of 1, 2, and 3

OPTIONS

• Configuration

• Plastic Package - OCPL

• Timing (Cycle Time)

• Operating Temperature Range

NOTE: 1. Off-center parting line

KEY TIMING PARAMETERS

*CL = CAS (READ) latency

64Mb: x32 SDRAM

64MSDRAMx32_5.p65 – Rev. B; Pub. 6/02

GRADE

SPEED

positive edge of system clock

be changed every clock cycle

PRECHARGE, and Auto Refresh Modes

2 Meg x 32 (512K x 32 x 4 banks)

86-pin TSOP (400 mil)

5ns (200 MHz)

5.5ns (183 MHz)

6ns (166 MHz)

7ns (143 MHz)

Commercial (0° to +70°C)

Extended (-40°C to +85°C)

-55

-5

-6

-7

2. Available on -7

FREQUENCY

200 MHz

183 MHz

166 MHz

143 MHz

CLOCK

MT48LC2M32B2TG-7

Part Number Example:

ACCESS TIME

CL = 3*

4.5ns

5.5ns

5ns

SETUP

TIME

1.5ns

2ns

MARKING

2M32B2

None

-55

-5

-6

-7

HOLD

TIME

1ns

MT48LC2M32B2 - 512K x 32 x 4 banks

For the latest data sheet, please refer to the Micron Web

site:

Note: The # symbol indicates signal is active LOW.

Configuration

Refresh Count

Row Addressing

Bank Addressing

Column Addressing

www.micron.com/sdramds

PIN ASSIGNMENT (TOP VIEW)

Micron Technology, Inc., reserves the right to change products or specifications without notice.

DQM0

DQM2

DQ16

DQ17

DQ18

DQ19

DQ20

DQ21

DQ22

DQ23

CAS#

RAS#

WE#

DQ0

DQ1

DQ2

DQ3

DQ4

DQ5

DQ6

DQ7

BA0

BA1

A10

CS#

86-PIN TSOP

512K x 32 x 4 banks

2 Meg x 32

4 (BA0, BA1)

2K (A0-A10)

256 (A0-A7)

64Mb: x32

SDRAM

DQ15

DQ14

DQ13

DQ12

DQ11

DQ10

DQ9

DQ8

DQM1

CLK

CKE

DQM3

DQ31

DQ30

DQ29

DQ28

DQ27

DQ26

DQ25

DQ24

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