MT9079AP1 Zarlink Semiconductor, MT9079AP1 Datasheet

MT9079AP1

Manufacturer Part Number

MT9079AP1

Description

PLCC

Manufacturer

Zarlink Semiconductor

Datasheet

1.MT9079AP1.pdf (74 pages)

Specifications of MT9079AP1

Date_code

10+

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Features

•

Applications

•

C4i/C2i

DLCLK

Meets applicable requirements of CCITT

G.704, G.706, G.732, G.775, G.796, I.431 and

ETSI ETS 300 011

HDB3, RZ, NRZ (fibre interface) and bipolar

NRZ line codes

Data link access and national bit buffers (five

bytes each)

Enhanced alarms, performance monitoring and

error insertion

Maskable interrupts for alarms, receive CAS bit

changes, exception conditions and counter

overflows

Automatic interworking between CRC-4 and

non-CRC-4 multiframing

Dual transmit and receive 16 byte circular

channel buffers

Two frame receive elastic buffer with controlled

slip direction indication and 26 channel

hysteresis (208 UI wander tolerance)

CRC-4 updating algorithm for intermediate path

points of a message-based data link application

Primary rate ISDN network nodes

Digital Access Cross-connect (DACs)

RxMF

TxMF

DSTo

RxDL

TxDL

DSTi

Interface

Control

F0i

(fig. 3)

Port

Interface

Control

Interface

Buffer

Data

Link

Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.

National

Buffer

Bit

ABCD

Signal

Buffer

Frame MUX/DEMUX

Transmit & Receive

Figure 1 - Functional Block Diagram

Dual 16

Byte Rx

Buffer

Zarlink Semiconductor Inc.

Code

Gen.

Test

Dual 16

Byte Tx

Buffer

ST-BUS Timing

CMOS ST-BUS

•

Description

The MT9079 is a feature rich E1 (PCM 30, 2.048

Mbps) link framer and controller that meets the latest

CCITT and ETSI requirements.

The MT9079 will interface to a 2.048 Mbps backplane

and can be controlled directly by a parallel processor,

serial controller or through the ST-BUS.

Extensive alarm transmission and reporting, as well as

exhaustive

diagnostic features make this device ideal for a wide

variety of applications.

CO and PABX switching equipment interfaces

E1 add/drop multiplexers and channel banks

Test equipment and satellite interfaces

MT9079AE

MT9079AL

MT9079AP

MT9079APR

MT9079AL1

MT9079AP1

MT9079APR1

Slip Control

Buffer With

2 Frame Rx

Performance

Monitoring &

Elastic

Control

Detector

Alarm

Phase

Timing

Circuit

Advanced Controller for E1

performance

Ordering Information

*Pb Free Matte Tin

-40 C to +85 C

40 Pin PDIP

44 Pin QFP

44 Pin PLCC

44 Pin QFP*

44 Pin PLCC*

Interface

PCM 30

Family

Link

(E1)

to all registers

and counters

monitoring

256

Timing

Circuit

Tubes

Trays

Tubes

Tape & Reel

Trays

Tubes

Tape & Reel

Data Sheet

MT9079

and

August 2006

TAIS

TxA

E8Ko

TxB

RxA

RxB

E2i

RESET

error

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