DM96L02N Fairchild Semiconductor, DM96L02N Datasheet
DM96L02N
Specifications of DM96L02N
Related parts for DM96L02N
DM96L02N Summary of contents
Page 1
... Each input is provided with a clamp diode to limit undershoot and minimize ringing induced by fast fall times acting on system wiring imped- ances. Ordering Code: Order Number Package Number DM96L02N N16E 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Logic Symbol V Pin 16 GND ...
Page 2
Functional Block Diagram Operation Notes 1. TRIGGERING—can be accomplished by a positive- going transition on pin 4 (12 negative-going transi- tion on pin 5 (11). Triggering begins as a signal crosses the input V :V threshold region; this ...
Page 3
Pulse Width vs. R Typical Characteristics t vs vs. T w(min vs and FIGURE 1. INPUT PULSE f 25 kHz Amp 3.0V Width 100 ...
Page 4
Absolute Maximum Ratings Supply Voltage Input Voltage Operating Free Air Temperature Range Storage Temperature Range Recommended Operating Conditions Symbol Parameter V Supply Voltage CC V HIGH Level Input Voltage IH V LOW Level Input Voltage IL I HIGH Level Output ...
Page 5
Electrical Characteristics over recommended operating free air temperature (unless otherwise noted) Symbol Parameter V Input Clamp Voltage I V HIGH Level Output Voltage OH V LOW Level Output Voltage OL I Input Current @ Max I Input Voltage I HIGH ...
Page 6
Physical Dimensions inches (millimeters) unless otherwise noted 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right at ...