74VHC164MX Fairchild Semiconductor, 74VHC164MX Datasheet
74VHC164MX
Specifications of 74VHC164MX
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74VHC164MX Summary of contents
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... N14A Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1993 Fairchild Semiconductor Corporation 74VHC164 Rev. 1.4.0 General Description 5V The VHC164 is an advanced high-speed CMOS device CC fabricated with silicon gate CMOS technology ...
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... Reset (MR) input overrides all other inputs and clears the register asynchronously, forcing all Q outputs LOW. Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©1993 Fairchild Semiconductor Corporation 74VHC164 Rev. 1.4.0 Logic Symbol Function Table Operating ...
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... OPR Input Rise and Fall Time 3.3V ± 0. 5.0V ± 0.5V CC Note: 1. Unused inputs must be held HIGH or LOW. They may not float. ©1993 Fairchild Semiconductor Corporation 74VHC164 Rev. 1.4.0 Parameter (1) Parameter 3 Rating –0.5V to +7.0V –0.5V to +7.0V –0. 0.5V CC –20mA ±20mA ±25mA ± ...
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... OL (2) V Quiet Output Minimum OLV Dynamic V OL (2) V Minimum HIGH Level IHD Dynamic Input Voltage (2) V Maximum LOW Level ILD Dynamic Input Voltage Note: 2. Parameter guaranteed by design. ©1993 Fairchild Semiconductor Corporation 74VHC164 Rev. 1.4.0 (V) Conditions Min. 1.50 0 –50µA 1 2.9 4.4 I – ...
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... Minimum Pulse Width (CP (L) Minimum Pulse Width (MR Minimum Setup Time S t Minimum Hold Time H t Minimum Removal Time (MR) REC Note 3.3 ± 0.3V or 5.0 ± 0.5V CC ©1993 Fairchild Semiconductor Corporation 74VHC164 Rev. 1.4.0 V (V) Conditions CC 3.3 ± 0.3 C 15pF 50pF 5.0 ± 0.5 C 15pF, R ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...
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... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...