X28C512D-25 Xicor, X28C512D-25 Datasheet

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X28C512D-25

Manufacturer Part Number
X28C512D-25
Description
Manufacturer
Xicor
Datasheet

Specifications of X28C512D-25

Date_code
98+

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
X28C512D-25
Manufacturer:
TOSHIBA
Quantity:
3 190
© Xicor, Inc. 1991, 1995, 1996 Patents Pending
3856-3.2 8/5/97 T1/C0/D0 EW
X28C512/X28C513
512K
FEATURES
PIN CONFIGURATIONS
V SS
I/O 0
I/O 1
I/O 2
A 15
A 12
NC
NC
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
Access Time: 90ns
Simple Byte and Page Write
—Single 5V Supply
—Self-Timed
Low Power CMOS:
—Active: 50mA
—Standby: 500 A
Software Data Protection
—Protects Data Against System Level
High Speed Page Write Capability
Highly Reliable Direct Write™ Cell
—Endurance: 100,000 Write Cycles
—Data Retention: 100 Years
Early End of Write Detection
—DATA Polling
—Toggle Bit Polling
— No External High Voltages or V
—No Erase Before Write
—No Complex Programming Algorithms
—No Overerase Problem
Inadvertant Writes
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
PLASTIC DIP
FLAT PACK
Circuits
SOIC (R)
CERDIP
X28C512
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
3856 FHD F01
V CC
WE
NC
A 14
A 13
A 8
A 9
A 11
OE
A 10
CE
I/O 7
I/O 6
I/O 5
I/0 4
I/O 3
V CC
A 11
A 13
A 14
A 15
A 12
WE
NC
NC
NC
NC
NC
NC
NC
5 Volt, Byte Alterable E
A 9
A 8
A 7
A 6
A 5
A 4
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
X28C512/X28C513
PP
13
12
10
Control
8
6
A 1
A 2
A 4
A 6
A 12
15
14
11
9
7
5
4
I/O 0
A 0
A 3
A 5
A 7
A 15
NC
17
16
2
3
I/O 2
I/O 1
NC
NC
TSOP
X28C512
BOTTOM
PGA
VIEW
19
18
36
1
I/O 3
V SS
V CC
NC
1
21
20
34
35
I/O 5
I/O 4
NC
WE
DESCRIPTION
The X28C512/513 is an 64K x 8 E
with Xicor’s proprietary, high performance, floating gate
CMOS technology. Like all Xicor programmable non-
volatile memories the X28C512/513 is a 5V only device.
The X28C512/513 features the JEDEC approved pinout
for bytewide memories, compatible with industry stan-
dard EPROMS.
The X28C512/513 supports a 128-byte page write op-
eration, effectively providing a 39 s/byte write cycle and
enabling the entire memory to be written in less than 2.5
seconds. The X28C512/513 also features DATA Polling
and Toggle Bit Polling, system software support schemes
used to indicate the early completion of a write cycle. In
addition, the X28C512/513 supports the Software Data
Protection option.
Two PLCC and LCC Pinouts
—X28C512
—X28C513
22
23
25
27
29
32
33
I/O 6
I/O 7
A 10
A 11
A 8
NC
NC
—X28C010 E
—Compatible with Lower Density E
24
26
28
30
31
CE
OE
A 9
A 13
A 14
2
3856 ILL F22
PROM
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
3856 FHD F02
OE
A 10
CE
I/O 7
I/O 6
I/O 5
I/O 4
I/O 3
NC
NC
V SS
NC
NC
I/O 2
I/O 1
I/O 0
A 0
A 1
A 2
A 3
2
PROM Pin Compatible
Characteristics subject to change without notice
I/O 0
I/O 0
NC
A 7
A 6
A 5
A 4
A 3
A 2
A 1
A 0
A 6
A 5
A 4
A 3
A 2
A 1
A 0
14
14
10
11
12
13
10
11
12
13
5 4 3
7
5 4 3
6
7
8
9
6
8
9
15
15
PLCC / LCC
2
(TOP VIEW)
(TOP VIEW)
PROM, fabricated
X28C512
X28C513
16
16
2
2
64K x 8 Bit
17
17
1
1
32
18 19 20
32
18 19 20
2
31
31
PROMs
29
28
27
26
25
24
23
22
29
28
27
26
25
24
23
22
30
30
21
21
3856 FHD F03
3856 FHD F04
A 14
A 13
A 8
A 9
A 11
OE
A 10
CE
I/O 7
A 8
A 9
A 11
NC
OE
A 10
CE
I/O 7
I/O 6

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