MB81F161622C-60FN Fujitsu, MB81F161622C-60FN Datasheet

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MB81F161622C-60FN

Manufacturer Part Number
MB81F161622C-60FN
Description
SDRAM 1Mx16, 166 MHz
Manufacturer
Fujitsu
Datasheet

Specifications of MB81F161622C-60FN

Package
T&R 3rd
Unit
1000
Date_code
00+
FUJITSU SEMICONDUCTOR
MEMORY
CMOS
2
SYNCHRONOUS DYNAMIC RAM
MB81F161622C-60/-70/-80/-80L
CL - t
Clock Frequency (CL = 3)
Burst Mode Cycle Time (CL = 3)
Access Time From Clock (CL = 3)
Operating Current
Power Down Mode Current (I
Self Refresh Mode Current (I
• Single +3.3 V Supply: +0.3 V / 0.15 V tolerance (-60)
• LVTTL compatible I/O interface
• 4 K refresh cycles every 64 ms
• Dual banks operation
• Burst read/write operation and burst
DESCRIPTION
PRODUCT LINE & FEATURES
The Fujitsu MB81F161622C is a CMOS Synchronous Dynamic Random Access Memory (SDRAM) containing
16,777,216 memory cells accessible in an 16-bit format. The MB81F161622C features a fully synchronous
operation referenced to a positive edge clock whereby all operations are synchronized at a clock input which
enables high performance and simple user interface coexistence. The MB81F161622C SDRAM is designed to
reduce the complexity of using a standard dynamic RAM (DRAM) which requires many control signal timing
constraints, and may improve data bandwidth of memory as much as 5 times more than a conventional DRAM.
The MB81F161622C is ideally suited for laser printers, high resolution graphic adapters, accelerators and other
applications where an extremely large memory and bandwidth are required and where a simple interface is
needed.
read/single write operation capability
DATA SHEET
RCD
- t
RP
512 K
Parameter
Synchronous Dynamic Random Access Memory
0.3 V tolerance (-70/-80/-80L)
CC6
CC2P
)
CMOS 2-Bank
)
16 BIT
3 - 3 - 3 clk min.
167 MHz max.
150 mA max.
5.5 ns max.
6.0 ns min.
1 mA max.
1 mA max.
-60
524,288-Word
3 - 3 - 3 clk min.
MB81F161622C
143 MHz max.
130 mA max.
7.0 ns min.
1 mA max.
1 mA max.
6 ns max.
• Byte control by DQMU/DQML
• Programmable burst type, burst length,
• Auto-and Self-refresh (every 15.6 s)
• CKE power down mode
• Output Enable and Input Data Mask
• 167 MHz/143MHz/125 MHz clock frequency
and CAS latency
-70
16 Bit
1 mA / 400 µA max.
3 - 3 - 3 clk min.
125 MHz max.
110 mA max.
8.0 ns min.
1 mA max.
6 ns max.
-80/-80L
(100MHz @CL=3)
Reference Spec
3 - 3 - 3 clk min.
100 MHz max.
90 mA max.
AE1E
1 mA max.
1 mA max.
10 ns min.
6 ns max.

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